6760 lines
216 KiB
Plaintext
6760 lines
216 KiB
Plaintext
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-- Copyright (C) 2023 Intel Corporation. All rights reserved.
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-- Your use of Intel Corporation's design tools, logic functions
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-- and other software and tools, and any partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Intel Program License
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-- Subscription Agreement, the Intel Quartus Prime License Agreement,
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-- the Intel FPGA IP License Agreement, or other applicable license
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-- agreement, including, without limitation, that your use is for
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-- the sole purpose of programming logic devices manufactured by
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-- Intel and sold by Intel or its authorized distributors. Please
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-- refer to the applicable agreement for further details, at
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-- https://fpgasoftware.intel.com/eula.
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-- VENDOR "Altera"
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-- PROGRAM "Quartus Prime"
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-- VERSION "Version 22.1std.2 Build 922 07/20/2023 SC Lite Edition"
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-- DATE "08/27/2023 01:29:16"
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--
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-- Device: Altera EP4CE115F29C7 Package FBGA780
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--
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--
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-- This VHDL file should be used for ModelSim (VHDL) only
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--
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LIBRARY ALTERA;
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LIBRARY CYCLONEIVE;
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LIBRARY IEEE;
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USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL;
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USE CYCLONEIVE.CYCLONEIVE_COMPONENTS.ALL;
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USE IEEE.STD_LOGIC_1164.ALL;
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ENTITY MAIN IS
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PORT (
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VGA_BLANK : BUFFER std_logic;
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VGA_SYNC : BUFFER std_logic;
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VGA_CLK : BUFFER std_logic;
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clk : IN std_logic;
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rst : IN std_logic;
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R : BUFFER std_logic_vector(7 DOWNTO 0);
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G : BUFFER std_logic_vector(7 DOWNTO 0);
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B : BUFFER std_logic_vector(7 DOWNTO 0);
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HS : BUFFER std_logic;
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VS : BUFFER std_logic
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);
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END MAIN;
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-- Design Ports Information
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-- VGA_BLANK => Location: PIN_F11, I/O Standard: 2.5 V, Current Strength: Default
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-- VGA_SYNC => Location: PIN_C10, I/O Standard: 2.5 V, Current Strength: Default
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-- VGA_CLK => Location: PIN_A12, I/O Standard: 2.5 V, Current Strength: Default
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-- R[0] => Location: PIN_E12, I/O Standard: 2.5 V, Current Strength: Default
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-- R[1] => Location: PIN_E11, I/O Standard: 2.5 V, Current Strength: Default
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-- R[2] => Location: PIN_D10, I/O Standard: 2.5 V, Current Strength: Default
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-- R[3] => Location: PIN_F12, I/O Standard: 2.5 V, Current Strength: Default
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-- R[4] => Location: PIN_G10, I/O Standard: 2.5 V, Current Strength: Default
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-- R[5] => Location: PIN_J12, I/O Standard: 2.5 V, Current Strength: Default
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-- R[6] => Location: PIN_H8, I/O Standard: 2.5 V, Current Strength: Default
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-- R[7] => Location: PIN_H10, I/O Standard: 2.5 V, Current Strength: Default
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-- G[0] => Location: PIN_G8, I/O Standard: 2.5 V, Current Strength: Default
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-- G[1] => Location: PIN_G11, I/O Standard: 2.5 V, Current Strength: Default
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-- G[2] => Location: PIN_F8, I/O Standard: 2.5 V, Current Strength: Default
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-- G[3] => Location: PIN_H12, I/O Standard: 2.5 V, Current Strength: Default
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-- G[4] => Location: PIN_C8, I/O Standard: 2.5 V, Current Strength: Default
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-- G[5] => Location: PIN_B8, I/O Standard: 2.5 V, Current Strength: Default
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-- G[6] => Location: PIN_F10, I/O Standard: 2.5 V, Current Strength: Default
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-- G[7] => Location: PIN_C9, I/O Standard: 2.5 V, Current Strength: Default
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-- B[0] => Location: PIN_B10, I/O Standard: 2.5 V, Current Strength: Default
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-- B[1] => Location: PIN_A10, I/O Standard: 2.5 V, Current Strength: Default
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-- B[2] => Location: PIN_C11, I/O Standard: 2.5 V, Current Strength: Default
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-- B[3] => Location: PIN_B11, I/O Standard: 2.5 V, Current Strength: Default
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-- B[4] => Location: PIN_A11, I/O Standard: 2.5 V, Current Strength: Default
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-- B[5] => Location: PIN_C12, I/O Standard: 2.5 V, Current Strength: Default
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-- B[6] => Location: PIN_D11, I/O Standard: 2.5 V, Current Strength: Default
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-- B[7] => Location: PIN_D12, I/O Standard: 2.5 V, Current Strength: Default
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-- HS => Location: PIN_G13, I/O Standard: 2.5 V, Current Strength: Default
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-- VS => Location: PIN_C13, I/O Standard: 2.5 V, Current Strength: Default
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-- clk => Location: PIN_AG14, I/O Standard: 2.5 V, Current Strength: Default
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-- rst => Location: PIN_R24, I/O Standard: 2.5 V, Current Strength: Default
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ARCHITECTURE structure OF MAIN IS
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SIGNAL gnd : std_logic := '0';
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SIGNAL vcc : std_logic := '1';
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SIGNAL unknown : std_logic := 'X';
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SIGNAL devoe : std_logic := '1';
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SIGNAL devclrn : std_logic := '1';
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SIGNAL devpor : std_logic := '1';
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SIGNAL ww_devoe : std_logic;
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SIGNAL ww_devclrn : std_logic;
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SIGNAL ww_devpor : std_logic;
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SIGNAL ww_VGA_BLANK : std_logic;
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SIGNAL ww_VGA_SYNC : std_logic;
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SIGNAL ww_VGA_CLK : std_logic;
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SIGNAL ww_clk : std_logic;
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SIGNAL ww_rst : std_logic;
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SIGNAL ww_R : std_logic_vector(7 DOWNTO 0);
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SIGNAL ww_G : std_logic_vector(7 DOWNTO 0);
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SIGNAL ww_B : std_logic_vector(7 DOWNTO 0);
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SIGNAL ww_HS : std_logic;
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SIGNAL ww_VS : std_logic;
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SIGNAL \myPLL|altpll_component|auto_generated|pll1_INCLK_bus\ : std_logic_vector(1 DOWNTO 0);
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SIGNAL \myPLL|altpll_component|auto_generated|pll1_CLK_bus\ : std_logic_vector(4 DOWNTO 0);
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SIGNAL \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
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SIGNAL \~ALTERA_ASDO_DATA1~~ibuf_o\ : std_logic;
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SIGNAL \~ALTERA_ASDO_DATA1~~padout\ : std_logic;
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SIGNAL \~ALTERA_FLASH_nCE_nCSO~~ibuf_o\ : std_logic;
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SIGNAL \~ALTERA_FLASH_nCE_nCSO~~padout\ : std_logic;
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SIGNAL \~ALTERA_DCLK~~padout\ : std_logic;
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SIGNAL \~ALTERA_DATA0~~ibuf_o\ : std_logic;
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SIGNAL \~ALTERA_DATA0~~padout\ : std_logic;
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SIGNAL \~ALTERA_nCEO~~padout\ : std_logic;
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SIGNAL \~ALTERA_DCLK~~obuf_o\ : std_logic;
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SIGNAL \~ALTERA_nCEO~~obuf_o\ : std_logic;
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SIGNAL \clk~input_o\ : std_logic;
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SIGNAL \myPLL|altpll_component|auto_generated|wire_pll1_fbout\ : std_logic;
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SIGNAL \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\ : std_logic;
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SIGNAL \myVGA|h_px_count[0]~10_combout\ : std_logic;
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SIGNAL \rst~input_o\ : std_logic;
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SIGNAL \myVGA|LessThan0~0_combout\ : std_logic;
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SIGNAL \myVGA|LessThan0~1_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[0]~11\ : std_logic;
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SIGNAL \myVGA|h_px_count[1]~12_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[1]~13\ : std_logic;
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SIGNAL \myVGA|h_px_count[2]~14_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[2]~15\ : std_logic;
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SIGNAL \myVGA|h_px_count[3]~16_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[3]~17\ : std_logic;
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SIGNAL \myVGA|h_px_count[4]~18_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[4]~19\ : std_logic;
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SIGNAL \myVGA|h_px_count[5]~20_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[5]~21\ : std_logic;
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SIGNAL \myVGA|h_px_count[6]~22_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[6]~23\ : std_logic;
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SIGNAL \myVGA|h_px_count[7]~24_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[7]~25\ : std_logic;
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SIGNAL \myVGA|h_px_count[8]~26_combout\ : std_logic;
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SIGNAL \myVGA|h_px_count[8]~27\ : std_logic;
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SIGNAL \myVGA|h_px_count[9]~28_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:ball_speed_x[1]~0_combout\ : std_logic;
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SIGNAL \myVGA|Add1~0_combout\ : std_logic;
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SIGNAL \myVGA|v_px_count[9]~0_combout\ : std_logic;
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SIGNAL \myVGA|Add1~1\ : std_logic;
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SIGNAL \myVGA|Add1~3\ : std_logic;
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SIGNAL \myVGA|Add1~4_combout\ : std_logic;
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SIGNAL \myVGA|v_px_count[2]~3_combout\ : std_logic;
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SIGNAL \myVGA|Add1~5\ : std_logic;
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SIGNAL \myVGA|Add1~6_combout\ : std_logic;
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SIGNAL \myVGA|v_px_count[3]~4_combout\ : std_logic;
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SIGNAL \myVGA|Add1~7\ : std_logic;
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SIGNAL \myVGA|Add1~8_combout\ : std_logic;
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SIGNAL \myVGA|Add1~9\ : std_logic;
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SIGNAL \myVGA|Add1~10_combout\ : std_logic;
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SIGNAL \myVGA|Add1~11\ : std_logic;
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SIGNAL \myVGA|Add1~12_combout\ : std_logic;
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SIGNAL \myVGA|Add1~13\ : std_logic;
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SIGNAL \myVGA|Add1~14_combout\ : std_logic;
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SIGNAL \myVGA|Add1~15\ : std_logic;
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SIGNAL \myVGA|Add1~16_combout\ : std_logic;
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SIGNAL \myVGA|Add1~17\ : std_logic;
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SIGNAL \myVGA|Add1~18_combout\ : std_logic;
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SIGNAL \myVGA|v_px_count[9]~2_combout\ : std_logic;
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SIGNAL \myVGA|Equal0~1_combout\ : std_logic;
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SIGNAL \myVGA|Equal0~0_combout\ : std_logic;
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SIGNAL \myVGA|Equal0~2_combout\ : std_logic;
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SIGNAL \myVGA|v_px_count[1]~1_combout\ : std_logic;
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SIGNAL \myVGA|Add1~2_combout\ : std_logic;
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SIGNAL \myVGA|v_px_count[1]~5_combout\ : std_logic;
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SIGNAL \myVGA|Equal1~0_combout\ : std_logic;
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SIGNAL \myVGA|Equal1~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[0]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[0]~q\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[0]~2\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[1]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[1]~q\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[1]~2\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[2]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[2]~q\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[2]~2\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[3]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[3]~q\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[3]~2\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[4]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[4]~q\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[4]~2\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[5]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[5]~q\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[5]~2\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[6]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[6]~q\ : std_logic;
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SIGNAL \myVGA|LessThan7~0_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[6]~2\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[7]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[7]~q\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[7]~2\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[8]~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:count[8]~q\ : std_logic;
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SIGNAL \myVGA|LessThan7~1_combout\ : std_logic;
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SIGNAL \myVGA|ball_b[0]~7_combout\ : std_logic;
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SIGNAL \myVGA|ball_bounce:ball_speed_x[1]~q\ : std_logic;
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SIGNAL \myVGA|ball_b[0]~24_combout\ : std_logic;
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SIGNAL \myVGA|ball_x[1]~10_cout\ : std_logic;
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SIGNAL \myVGA|ball_x[1]~11_combout\ : std_logic;
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SIGNAL \myVGA|ball_x[1]~12\ : std_logic;
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SIGNAL \myVGA|ball_x[2]~13_combout\ : std_logic;
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SIGNAL \myVGA|ball_x[2]~14\ : std_logic;
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SIGNAL \myVGA|ball_x[3]~15_combout\ : std_logic;
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SIGNAL \myVGA|ball_x[3]~16\ : std_logic;
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SIGNAL \myVGA|ball_x[4]~17_combout\ : std_logic;
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SIGNAL \myVGA|ball_x[4]~18\ : std_logic;
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SIGNAL \myVGA|ball_x[5]~19_combout\ : std_logic;
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SIGNAL \myVGA|Add19~0_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[9]~q\ : std_logic;
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SIGNAL \myVGA|Add18~0_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[0]~q\ : std_logic;
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SIGNAL \myVGA|Add18~1\ : std_logic;
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SIGNAL \myVGA|Add18~2_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[1]~q\ : std_logic;
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SIGNAL \myVGA|Add18~3\ : std_logic;
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SIGNAL \myVGA|Add18~4_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[2]~q\ : std_logic;
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SIGNAL \myVGA|Add18~5\ : std_logic;
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SIGNAL \myVGA|Add18~6_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[3]~q\ : std_logic;
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SIGNAL \myVGA|Add18~7\ : std_logic;
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SIGNAL \myVGA|Add18~8_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[4]~q\ : std_logic;
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SIGNAL \myVGA|Add18~9\ : std_logic;
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SIGNAL \myVGA|Add18~10_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[5]~q\ : std_logic;
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SIGNAL \myVGA|Add18~11\ : std_logic;
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SIGNAL \myVGA|Add18~12_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[6]~q\ : std_logic;
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SIGNAL \myVGA|Add18~13\ : std_logic;
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SIGNAL \myVGA|Add18~14_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[7]~q\ : std_logic;
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SIGNAL \myVGA|Add18~15\ : std_logic;
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SIGNAL \myVGA|Add18~16_combout\ : std_logic;
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SIGNAL \myVGA|vary_ball_width:count[8]~q\ : std_logic;
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SIGNAL \myVGA|Add18~17\ : std_logic;
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SIGNAL \myVGA|Add18~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|BALL_WIDTH[5]~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|BALL_WIDTH[5]~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|BALL_WIDTH[5]~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|BALL_WIDTH[5]~3_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~1\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|BALL_WIDTH[1]~5_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~3\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|growth~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|vary_ball_width:growth[1]~q\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~5\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|BALL_WIDTH[3]~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~7\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~8_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|growth~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|growth~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~9\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add19~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan10~1_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan10~3_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan10~5_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan10~7_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan10~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan10~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_x[5]~20\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_x[6]~21_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_x[6]~22\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_x[7]~23_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan10~12_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~1\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~3\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~5\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~7\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~8_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~9\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~7_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_x[7]~24\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_x[8]~25_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~3_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add3~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~5_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan8~8_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_speed_x~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_x[8]~26\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_x[9]~27_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~1\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~3\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~5\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~7\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~9\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~11\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~13\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~15\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~17\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~16_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~14_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~12_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~8_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~1_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~3_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~5_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~7_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~11_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~13_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~15_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~17_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan12~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[1]~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[1]~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[1]~11\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[2]~12_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[2]~13\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[3]~14_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[3]~15\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[4]~16_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[4]~17\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[5]~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[5]~19\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[6]~20_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan11~1_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan11~3_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan11~5_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan11~7_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan11~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan11~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~1\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~3\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~5\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~7\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~9\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~8_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add5~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan9~1_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan9~3_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan9~5_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan9~7_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan9~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan9~11_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan9~12_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_speed_y~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_bounce:ball_speed_y[1]~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_bounce:ball_speed_y[1]~q\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[6]~21\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[7]~22_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_speed_y~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[7]~23\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_y[8]~24_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~1\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~3\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~5\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~7\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~9\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~11\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~13\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~15\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~17\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~16_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~14_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~12_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~8_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add16~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~1_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~3_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~5_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~7_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~11_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~13_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~15_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~17_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan14~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~19\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add14~20_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~1\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~3\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~5\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~7\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~9\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~11\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~13\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~15\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~17\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~16_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~14_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~12_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~8_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~1_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~3_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~5_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~7_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~11_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~13_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~15_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~17_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan13~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~1\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~3\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~5\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~7\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~9\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~11\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~13\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~15\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~17\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~16_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~14_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~12_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~8_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add17~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~1_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~3_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~5_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~7_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~11_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~13_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~15_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~17_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|LessThan15~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~19\ : std_logic;
|
||
|
|
SIGNAL \myVGA|Add15~20_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_draw~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_draw~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|can_draw~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|V_SYNC_GEN~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|can_draw~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|can_draw~q\ : std_logic;
|
||
|
|
SIGNAL \myVGA|R[1]~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[1]~7_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|R[2]~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[1]~8\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[2]~9_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|R[3]~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[2]~10\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[3]~11_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|R[4]~3_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[3]~12\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[4]~13_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|R[5]~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[4]~14\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[5]~15_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|R[6]~5_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[5]~16\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[6]~17_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|R[7]~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[6]~18\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_g[7]~19_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|G[7]~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[1]~9_cout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[1]~10_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|B[1]~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[1]~11\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[2]~12_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|B[2]~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[2]~13\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[3]~14_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|B[3]~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[3]~15\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[4]~16_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|B[4]~3_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[4]~17\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[5]~18_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|B[5]~4_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[5]~19\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[6]~20_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|B[6]~5_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[6]~21\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ball_b[7]~22_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|B[7]~6_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|H_SYNC_GEN~0_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|H_SYNC_GEN~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|HS~q\ : std_logic;
|
||
|
|
SIGNAL \myVGA|V_SYNC_GEN~1_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|V_SYNC_GEN~2_combout\ : std_logic;
|
||
|
|
SIGNAL \myVGA|VS~q\ : std_logic;
|
||
|
|
SIGNAL \myVGA|BALL_WIDTH\ : std_logic_vector(5 DOWNTO 0);
|
||
|
|
SIGNAL \myVGA|v_px_count\ : std_logic_vector(9 DOWNTO 0);
|
||
|
|
SIGNAL \myVGA|color_mask\ : std_logic_vector(7 DOWNTO 0);
|
||
|
|
SIGNAL \myVGA|ball_g\ : std_logic_vector(7 DOWNTO 0);
|
||
|
|
SIGNAL \myPLL|altpll_component|auto_generated|wire_pll1_clk\ : std_logic_vector(4 DOWNTO 0);
|
||
|
|
SIGNAL \myVGA|ball_y\ : std_logic_vector(8 DOWNTO 0);
|
||
|
|
SIGNAL \myVGA|ball_b\ : std_logic_vector(7 DOWNTO 0);
|
||
|
|
SIGNAL \myVGA|h_px_count\ : std_logic_vector(9 DOWNTO 0);
|
||
|
|
SIGNAL \myVGA|ball_x\ : std_logic_vector(9 DOWNTO 0);
|
||
|
|
SIGNAL \myVGA|ALT_INV_VS~q\ : std_logic;
|
||
|
|
SIGNAL \myVGA|ALT_INV_HS~q\ : std_logic;
|
||
|
|
|
||
|
|
BEGIN
|
||
|
|
|
||
|
|
VGA_BLANK <= ww_VGA_BLANK;
|
||
|
|
VGA_SYNC <= ww_VGA_SYNC;
|
||
|
|
VGA_CLK <= ww_VGA_CLK;
|
||
|
|
ww_clk <= clk;
|
||
|
|
ww_rst <= rst;
|
||
|
|
R <= ww_R;
|
||
|
|
G <= ww_G;
|
||
|
|
B <= ww_B;
|
||
|
|
HS <= ww_HS;
|
||
|
|
VS <= ww_VS;
|
||
|
|
ww_devoe <= devoe;
|
||
|
|
ww_devclrn <= devclrn;
|
||
|
|
ww_devpor <= devpor;
|
||
|
|
|
||
|
|
\myPLL|altpll_component|auto_generated|pll1_INCLK_bus\ <= (gnd & \clk~input_o\);
|
||
|
|
|
||
|
|
\myPLL|altpll_component|auto_generated|wire_pll1_clk\(0) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(0);
|
||
|
|
\myPLL|altpll_component|auto_generated|wire_pll1_clk\(1) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(1);
|
||
|
|
\myPLL|altpll_component|auto_generated|wire_pll1_clk\(2) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(2);
|
||
|
|
\myPLL|altpll_component|auto_generated|wire_pll1_clk\(3) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(3);
|
||
|
|
\myPLL|altpll_component|auto_generated|wire_pll1_clk\(4) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(4);
|
||
|
|
|
||
|
|
\myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \myPLL|altpll_component|auto_generated|wire_pll1_clk\(0));
|
||
|
|
\myVGA|ALT_INV_VS~q\ <= NOT \myVGA|VS~q\;
|
||
|
|
\myVGA|ALT_INV_HS~q\ <= NOT \myVGA|HS~q\;
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X31_Y73_N9
|
||
|
|
\VGA_BLANK~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => VCC,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_VGA_BLANK);
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X35_Y73_N16
|
||
|
|
\VGA_SYNC~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => GND,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_VGA_SYNC);
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X47_Y73_N2
|
||
|
|
\VGA_CLK~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_VGA_CLK);
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X33_Y73_N2
|
||
|
|
\R[0]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => GND,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_R(0));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X31_Y73_N2
|
||
|
|
\R[1]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[1]~0_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_R(1));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X35_Y73_N23
|
||
|
|
\R[2]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[2]~1_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_R(2));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X33_Y73_N9
|
||
|
|
\R[3]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[3]~2_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_R(3));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X20_Y73_N9
|
||
|
|
\R[4]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[4]~3_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_R(4));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X40_Y73_N9
|
||
|
|
\R[5]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[5]~4_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_R(5));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X11_Y73_N23
|
||
|
|
\R[6]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[6]~5_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_R(6));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X20_Y73_N16
|
||
|
|
\R[7]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[7]~6_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_R(7));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X11_Y73_N16
|
||
|
|
\G[0]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[1]~0_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_G(0));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X25_Y73_N16
|
||
|
|
\G[1]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[2]~1_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_G(1));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X11_Y73_N9
|
||
|
|
\G[2]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[3]~2_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_G(2));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X25_Y73_N23
|
||
|
|
\G[3]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[4]~3_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_G(3));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X16_Y73_N9
|
||
|
|
\G[4]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[5]~4_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_G(4));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X16_Y73_N2
|
||
|
|
\G[5]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[6]~5_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_G(5));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X20_Y73_N2
|
||
|
|
\G[6]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[7]~6_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_G(6));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X23_Y73_N16
|
||
|
|
\G[7]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|G[7]~0_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_G(7));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X38_Y73_N9
|
||
|
|
\B[0]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|R[1]~0_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_B(0));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X38_Y73_N2
|
||
|
|
\B[1]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|B[1]~0_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_B(1));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X23_Y73_N2
|
||
|
|
\B[2]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|B[2]~1_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_B(2));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X42_Y73_N9
|
||
|
|
\B[3]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|B[3]~2_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_B(3));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X42_Y73_N2
|
||
|
|
\B[4]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|B[4]~3_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_B(4));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X52_Y73_N16
|
||
|
|
\B[5]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|B[5]~4_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_B(5));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X23_Y73_N9
|
||
|
|
\B[6]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|B[6]~5_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_B(6));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X52_Y73_N23
|
||
|
|
\B[7]~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|B[7]~6_combout\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_B(7));
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X38_Y73_N16
|
||
|
|
\HS~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|ALT_INV_HS~q\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_HS);
|
||
|
|
|
||
|
|
-- Location: IOOBUF_X54_Y73_N2
|
||
|
|
\VS~output\ : cycloneive_io_obuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
open_drain_output => "false")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => \myVGA|ALT_INV_VS~q\,
|
||
|
|
devoe => ww_devoe,
|
||
|
|
o => ww_VS);
|
||
|
|
|
||
|
|
-- Location: IOIBUF_X58_Y0_N22
|
||
|
|
\clk~input\ : cycloneive_io_ibuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
simulate_z_as => "z")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => ww_clk,
|
||
|
|
o => \clk~input_o\);
|
||
|
|
|
||
|
|
-- Location: PLL_4
|
||
|
|
\myPLL|altpll_component|auto_generated|pll1\ : cycloneive_pll
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
auto_settings => "false",
|
||
|
|
bandwidth_type => "medium",
|
||
|
|
c0_high => 11,
|
||
|
|
c0_initial => 1,
|
||
|
|
c0_low => 10,
|
||
|
|
c0_mode => "odd",
|
||
|
|
c0_ph => 0,
|
||
|
|
c1_high => 0,
|
||
|
|
c1_initial => 0,
|
||
|
|
c1_low => 0,
|
||
|
|
c1_mode => "bypass",
|
||
|
|
c1_ph => 0,
|
||
|
|
c1_use_casc_in => "off",
|
||
|
|
c2_high => 0,
|
||
|
|
c2_initial => 0,
|
||
|
|
c2_low => 0,
|
||
|
|
c2_mode => "bypass",
|
||
|
|
c2_ph => 0,
|
||
|
|
c2_use_casc_in => "off",
|
||
|
|
c3_high => 0,
|
||
|
|
c3_initial => 0,
|
||
|
|
c3_low => 0,
|
||
|
|
c3_mode => "bypass",
|
||
|
|
c3_ph => 0,
|
||
|
|
c3_use_casc_in => "off",
|
||
|
|
c4_high => 0,
|
||
|
|
c4_initial => 0,
|
||
|
|
c4_low => 0,
|
||
|
|
c4_mode => "bypass",
|
||
|
|
c4_ph => 0,
|
||
|
|
c4_use_casc_in => "off",
|
||
|
|
charge_pump_current_bits => 1,
|
||
|
|
clk0_counter => "c0",
|
||
|
|
clk0_divide_by => 147,
|
||
|
|
clk0_duty_cycle => 50,
|
||
|
|
clk0_multiply_by => 74,
|
||
|
|
clk0_phase_shift => "0",
|
||
|
|
clk1_counter => "unused",
|
||
|
|
clk1_divide_by => 0,
|
||
|
|
clk1_duty_cycle => 50,
|
||
|
|
clk1_multiply_by => 0,
|
||
|
|
clk1_phase_shift => "0",
|
||
|
|
clk2_counter => "unused",
|
||
|
|
clk2_divide_by => 0,
|
||
|
|
clk2_duty_cycle => 50,
|
||
|
|
clk2_multiply_by => 0,
|
||
|
|
clk2_phase_shift => "0",
|
||
|
|
clk3_counter => "unused",
|
||
|
|
clk3_divide_by => 0,
|
||
|
|
clk3_duty_cycle => 50,
|
||
|
|
clk3_multiply_by => 0,
|
||
|
|
clk3_phase_shift => "0",
|
||
|
|
clk4_counter => "unused",
|
||
|
|
clk4_divide_by => 0,
|
||
|
|
clk4_duty_cycle => 50,
|
||
|
|
clk4_multiply_by => 0,
|
||
|
|
clk4_phase_shift => "0",
|
||
|
|
compensate_clock => "clock0",
|
||
|
|
inclk0_input_frequency => 20000,
|
||
|
|
inclk1_input_frequency => 0,
|
||
|
|
loop_filter_c_bits => 0,
|
||
|
|
loop_filter_r_bits => 16,
|
||
|
|
m => 74,
|
||
|
|
m_initial => 1,
|
||
|
|
m_ph => 0,
|
||
|
|
n => 7,
|
||
|
|
operation_mode => "normal",
|
||
|
|
pfd_max => 200000,
|
||
|
|
pfd_min => 3076,
|
||
|
|
self_reset_on_loss_lock => "off",
|
||
|
|
simulation_type => "functional",
|
||
|
|
switch_over_type => "auto",
|
||
|
|
vco_center => 1538,
|
||
|
|
vco_divide_by => 0,
|
||
|
|
vco_frequency_control => "auto",
|
||
|
|
vco_max => 3333,
|
||
|
|
vco_min => 1538,
|
||
|
|
vco_multiply_by => 0,
|
||
|
|
vco_phase_shift_step => 236,
|
||
|
|
vco_post_scale => 2)
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
fbin => \myPLL|altpll_component|auto_generated|wire_pll1_fbout\,
|
||
|
|
inclk => \myPLL|altpll_component|auto_generated|pll1_INCLK_bus\,
|
||
|
|
fbout => \myPLL|altpll_component|auto_generated|wire_pll1_fbout\,
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|pll1_CLK_bus\);
|
||
|
|
|
||
|
|
-- Location: CLKCTRL_G18
|
||
|
|
\myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl\ : cycloneive_clkctrl
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
clock_type => "global clock",
|
||
|
|
ena_register_mode => "none")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
inclk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_INCLK_bus\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
outclk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N8
|
||
|
|
\myVGA|h_px_count[0]~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[0]~10_combout\ = \myVGA|h_px_count\(0) $ (VCC)
|
||
|
|
-- \myVGA|h_px_count[0]~11\ = CARRY(\myVGA|h_px_count\(0))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011001111001100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|h_px_count\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|h_px_count[0]~10_combout\,
|
||
|
|
cout => \myVGA|h_px_count[0]~11\);
|
||
|
|
|
||
|
|
-- Location: IOIBUF_X115_Y35_N22
|
||
|
|
\rst~input\ : cycloneive_io_ibuf
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
bus_hold => "false",
|
||
|
|
simulate_z_as => "z")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
i => ww_rst,
|
||
|
|
o => \rst~input_o\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N24
|
||
|
|
\myVGA|LessThan0~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan0~0_combout\ = ((!\myVGA|h_px_count\(5) & (!\myVGA|h_px_count\(6) & !\myVGA|h_px_count\(7)))) # (!\myVGA|h_px_count\(8))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011001100110111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(5),
|
||
|
|
datab => \myVGA|h_px_count\(8),
|
||
|
|
datac => \myVGA|h_px_count\(6),
|
||
|
|
datad => \myVGA|h_px_count\(7),
|
||
|
|
combout => \myVGA|LessThan0~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N30
|
||
|
|
\myVGA|LessThan0~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan0~1_combout\ = (\myVGA|h_px_count\(9) & !\myVGA|LessThan0~0_combout\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000011110000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datac => \myVGA|h_px_count\(9),
|
||
|
|
datad => \myVGA|LessThan0~0_combout\,
|
||
|
|
combout => \myVGA|LessThan0~1_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N9
|
||
|
|
\myVGA|h_px_count[0]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[0]~10_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(0));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N10
|
||
|
|
\myVGA|h_px_count[1]~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[1]~12_combout\ = (\myVGA|h_px_count\(1) & (!\myVGA|h_px_count[0]~11\)) # (!\myVGA|h_px_count\(1) & ((\myVGA|h_px_count[0]~11\) # (GND)))
|
||
|
|
-- \myVGA|h_px_count[1]~13\ = CARRY((!\myVGA|h_px_count[0]~11\) # (!\myVGA|h_px_count\(1)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|h_px_count[0]~11\,
|
||
|
|
combout => \myVGA|h_px_count[1]~12_combout\,
|
||
|
|
cout => \myVGA|h_px_count[1]~13\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N11
|
||
|
|
\myVGA|h_px_count[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[1]~12_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(1));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N12
|
||
|
|
\myVGA|h_px_count[2]~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[2]~14_combout\ = (\myVGA|h_px_count\(2) & (\myVGA|h_px_count[1]~13\ $ (GND))) # (!\myVGA|h_px_count\(2) & (!\myVGA|h_px_count[1]~13\ & VCC))
|
||
|
|
-- \myVGA|h_px_count[2]~15\ = CARRY((\myVGA|h_px_count\(2) & !\myVGA|h_px_count[1]~13\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|h_px_count[1]~13\,
|
||
|
|
combout => \myVGA|h_px_count[2]~14_combout\,
|
||
|
|
cout => \myVGA|h_px_count[2]~15\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N13
|
||
|
|
\myVGA|h_px_count[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[2]~14_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(2));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N14
|
||
|
|
\myVGA|h_px_count[3]~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[3]~16_combout\ = (\myVGA|h_px_count\(3) & (!\myVGA|h_px_count[2]~15\)) # (!\myVGA|h_px_count\(3) & ((\myVGA|h_px_count[2]~15\) # (GND)))
|
||
|
|
-- \myVGA|h_px_count[3]~17\ = CARRY((!\myVGA|h_px_count[2]~15\) # (!\myVGA|h_px_count\(3)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|h_px_count\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|h_px_count[2]~15\,
|
||
|
|
combout => \myVGA|h_px_count[3]~16_combout\,
|
||
|
|
cout => \myVGA|h_px_count[3]~17\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N15
|
||
|
|
\myVGA|h_px_count[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[3]~16_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(3));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N16
|
||
|
|
\myVGA|h_px_count[4]~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[4]~18_combout\ = (\myVGA|h_px_count\(4) & (\myVGA|h_px_count[3]~17\ $ (GND))) # (!\myVGA|h_px_count\(4) & (!\myVGA|h_px_count[3]~17\ & VCC))
|
||
|
|
-- \myVGA|h_px_count[4]~19\ = CARRY((\myVGA|h_px_count\(4) & !\myVGA|h_px_count[3]~17\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|h_px_count[3]~17\,
|
||
|
|
combout => \myVGA|h_px_count[4]~18_combout\,
|
||
|
|
cout => \myVGA|h_px_count[4]~19\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N17
|
||
|
|
\myVGA|h_px_count[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[4]~18_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(4));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N18
|
||
|
|
\myVGA|h_px_count[5]~20\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[5]~20_combout\ = (\myVGA|h_px_count\(5) & (!\myVGA|h_px_count[4]~19\)) # (!\myVGA|h_px_count\(5) & ((\myVGA|h_px_count[4]~19\) # (GND)))
|
||
|
|
-- \myVGA|h_px_count[5]~21\ = CARRY((!\myVGA|h_px_count[4]~19\) # (!\myVGA|h_px_count\(5)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|h_px_count[4]~19\,
|
||
|
|
combout => \myVGA|h_px_count[5]~20_combout\,
|
||
|
|
cout => \myVGA|h_px_count[5]~21\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N19
|
||
|
|
\myVGA|h_px_count[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[5]~20_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(5));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N20
|
||
|
|
\myVGA|h_px_count[6]~22\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[6]~22_combout\ = (\myVGA|h_px_count\(6) & (\myVGA|h_px_count[5]~21\ $ (GND))) # (!\myVGA|h_px_count\(6) & (!\myVGA|h_px_count[5]~21\ & VCC))
|
||
|
|
-- \myVGA|h_px_count[6]~23\ = CARRY((\myVGA|h_px_count\(6) & !\myVGA|h_px_count[5]~21\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|h_px_count\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|h_px_count[5]~21\,
|
||
|
|
combout => \myVGA|h_px_count[6]~22_combout\,
|
||
|
|
cout => \myVGA|h_px_count[6]~23\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N21
|
||
|
|
\myVGA|h_px_count[6]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[6]~22_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(6));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N22
|
||
|
|
\myVGA|h_px_count[7]~24\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[7]~24_combout\ = (\myVGA|h_px_count\(7) & (!\myVGA|h_px_count[6]~23\)) # (!\myVGA|h_px_count\(7) & ((\myVGA|h_px_count[6]~23\) # (GND)))
|
||
|
|
-- \myVGA|h_px_count[7]~25\ = CARRY((!\myVGA|h_px_count[6]~23\) # (!\myVGA|h_px_count\(7)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|h_px_count[6]~23\,
|
||
|
|
combout => \myVGA|h_px_count[7]~24_combout\,
|
||
|
|
cout => \myVGA|h_px_count[7]~25\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N23
|
||
|
|
\myVGA|h_px_count[7]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[7]~24_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(7));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N24
|
||
|
|
\myVGA|h_px_count[8]~26\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[8]~26_combout\ = (\myVGA|h_px_count\(8) & (\myVGA|h_px_count[7]~25\ $ (GND))) # (!\myVGA|h_px_count\(8) & (!\myVGA|h_px_count[7]~25\ & VCC))
|
||
|
|
-- \myVGA|h_px_count[8]~27\ = CARRY((\myVGA|h_px_count\(8) & !\myVGA|h_px_count[7]~25\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|h_px_count\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|h_px_count[7]~25\,
|
||
|
|
combout => \myVGA|h_px_count[8]~26_combout\,
|
||
|
|
cout => \myVGA|h_px_count[8]~27\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N25
|
||
|
|
\myVGA|h_px_count[8]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[8]~26_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(8));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N26
|
||
|
|
\myVGA|h_px_count[9]~28\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|h_px_count[9]~28_combout\ = \myVGA|h_px_count\(9) $ (\myVGA|h_px_count[8]~27\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(9),
|
||
|
|
cin => \myVGA|h_px_count[8]~27\,
|
||
|
|
combout => \myVGA|h_px_count[9]~28_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N27
|
||
|
|
\myVGA|h_px_count[9]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|h_px_count[9]~28_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
sclr => \myVGA|LessThan0~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|h_px_count\(9));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N2
|
||
|
|
\myVGA|ball_bounce:ball_speed_x[1]~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:ball_speed_x[1]~0_combout\ = !\myVGA|ball_speed_x~0_combout\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111100001111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datac => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
combout => \myVGA|ball_bounce:ball_speed_x[1]~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N10
|
||
|
|
\myVGA|Add1~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~0_combout\ = \myVGA|v_px_count\(0) $ (VCC)
|
||
|
|
-- \myVGA|Add1~1\ = CARRY(\myVGA|v_px_count\(0))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101010110101010",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add1~0_combout\,
|
||
|
|
cout => \myVGA|Add1~1\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N6
|
||
|
|
\myVGA|v_px_count[9]~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|v_px_count[9]~0_combout\ = (\rst~input_o\ & ((\myVGA|Equal0~2_combout\) # ((!\myVGA|LessThan0~0_combout\ & \myVGA|h_px_count\(9)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1011101000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Equal0~2_combout\,
|
||
|
|
datab => \myVGA|LessThan0~0_combout\,
|
||
|
|
datac => \myVGA|h_px_count\(9),
|
||
|
|
datad => \rst~input_o\,
|
||
|
|
combout => \myVGA|v_px_count[9]~0_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N11
|
||
|
|
\myVGA|v_px_count[0]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add1~0_combout\,
|
||
|
|
ena => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(0));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N12
|
||
|
|
\myVGA|Add1~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~2_combout\ = (\myVGA|v_px_count\(1) & (!\myVGA|Add1~1\)) # (!\myVGA|v_px_count\(1) & ((\myVGA|Add1~1\) # (GND)))
|
||
|
|
-- \myVGA|Add1~3\ = CARRY((!\myVGA|Add1~1\) # (!\myVGA|v_px_count\(1)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add1~1\,
|
||
|
|
combout => \myVGA|Add1~2_combout\,
|
||
|
|
cout => \myVGA|Add1~3\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N14
|
||
|
|
\myVGA|Add1~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~4_combout\ = (\myVGA|v_px_count\(2) & (\myVGA|Add1~3\ $ (GND))) # (!\myVGA|v_px_count\(2) & (!\myVGA|Add1~3\ & VCC))
|
||
|
|
-- \myVGA|Add1~5\ = CARRY((\myVGA|v_px_count\(2) & !\myVGA|Add1~3\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add1~3\,
|
||
|
|
combout => \myVGA|Add1~4_combout\,
|
||
|
|
cout => \myVGA|Add1~5\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N2
|
||
|
|
\myVGA|v_px_count[2]~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|v_px_count[2]~3_combout\ = (\myVGA|v_px_count[1]~1_combout\ & ((\myVGA|Add1~4_combout\) # ((!\myVGA|v_px_count[9]~0_combout\ & \myVGA|v_px_count\(2))))) # (!\myVGA|v_px_count[1]~1_combout\ & (!\myVGA|v_px_count[9]~0_combout\ &
|
||
|
|
-- (\myVGA|v_px_count\(2))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1011101000110000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count[1]~1_combout\,
|
||
|
|
datab => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
datac => \myVGA|v_px_count\(2),
|
||
|
|
datad => \myVGA|Add1~4_combout\,
|
||
|
|
combout => \myVGA|v_px_count[2]~3_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N3
|
||
|
|
\myVGA|v_px_count[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|v_px_count[2]~3_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(2));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N16
|
||
|
|
\myVGA|Add1~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~6_combout\ = (\myVGA|v_px_count\(3) & (!\myVGA|Add1~5\)) # (!\myVGA|v_px_count\(3) & ((\myVGA|Add1~5\) # (GND)))
|
||
|
|
-- \myVGA|Add1~7\ = CARRY((!\myVGA|Add1~5\) # (!\myVGA|v_px_count\(3)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|v_px_count\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add1~5\,
|
||
|
|
combout => \myVGA|Add1~6_combout\,
|
||
|
|
cout => \myVGA|Add1~7\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N4
|
||
|
|
\myVGA|v_px_count[3]~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|v_px_count[3]~4_combout\ = (\myVGA|v_px_count[1]~1_combout\ & ((\myVGA|Add1~6_combout\) # ((!\myVGA|v_px_count[9]~0_combout\ & \myVGA|v_px_count\(3))))) # (!\myVGA|v_px_count[1]~1_combout\ & (!\myVGA|v_px_count[9]~0_combout\ &
|
||
|
|
-- (\myVGA|v_px_count\(3))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1011101000110000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count[1]~1_combout\,
|
||
|
|
datab => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
datac => \myVGA|v_px_count\(3),
|
||
|
|
datad => \myVGA|Add1~6_combout\,
|
||
|
|
combout => \myVGA|v_px_count[3]~4_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N5
|
||
|
|
\myVGA|v_px_count[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|v_px_count[3]~4_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(3));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N18
|
||
|
|
\myVGA|Add1~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~8_combout\ = (\myVGA|v_px_count\(4) & (\myVGA|Add1~7\ $ (GND))) # (!\myVGA|v_px_count\(4) & (!\myVGA|Add1~7\ & VCC))
|
||
|
|
-- \myVGA|Add1~9\ = CARRY((\myVGA|v_px_count\(4) & !\myVGA|Add1~7\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|v_px_count\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add1~7\,
|
||
|
|
combout => \myVGA|Add1~8_combout\,
|
||
|
|
cout => \myVGA|Add1~9\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N19
|
||
|
|
\myVGA|v_px_count[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add1~8_combout\,
|
||
|
|
ena => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(4));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N20
|
||
|
|
\myVGA|Add1~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~10_combout\ = (\myVGA|v_px_count\(5) & (!\myVGA|Add1~9\)) # (!\myVGA|v_px_count\(5) & ((\myVGA|Add1~9\) # (GND)))
|
||
|
|
-- \myVGA|Add1~11\ = CARRY((!\myVGA|Add1~9\) # (!\myVGA|v_px_count\(5)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|v_px_count\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add1~9\,
|
||
|
|
combout => \myVGA|Add1~10_combout\,
|
||
|
|
cout => \myVGA|Add1~11\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N21
|
||
|
|
\myVGA|v_px_count[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add1~10_combout\,
|
||
|
|
ena => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(5));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N22
|
||
|
|
\myVGA|Add1~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~12_combout\ = (\myVGA|v_px_count\(6) & (\myVGA|Add1~11\ $ (GND))) # (!\myVGA|v_px_count\(6) & (!\myVGA|Add1~11\ & VCC))
|
||
|
|
-- \myVGA|Add1~13\ = CARRY((\myVGA|v_px_count\(6) & !\myVGA|Add1~11\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add1~11\,
|
||
|
|
combout => \myVGA|Add1~12_combout\,
|
||
|
|
cout => \myVGA|Add1~13\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N23
|
||
|
|
\myVGA|v_px_count[6]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add1~12_combout\,
|
||
|
|
ena => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(6));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N24
|
||
|
|
\myVGA|Add1~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~14_combout\ = (\myVGA|v_px_count\(7) & (!\myVGA|Add1~13\)) # (!\myVGA|v_px_count\(7) & ((\myVGA|Add1~13\) # (GND)))
|
||
|
|
-- \myVGA|Add1~15\ = CARRY((!\myVGA|Add1~13\) # (!\myVGA|v_px_count\(7)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|v_px_count\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add1~13\,
|
||
|
|
combout => \myVGA|Add1~14_combout\,
|
||
|
|
cout => \myVGA|Add1~15\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N25
|
||
|
|
\myVGA|v_px_count[7]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add1~14_combout\,
|
||
|
|
ena => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(7));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N26
|
||
|
|
\myVGA|Add1~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~16_combout\ = (\myVGA|v_px_count\(8) & (\myVGA|Add1~15\ $ (GND))) # (!\myVGA|v_px_count\(8) & (!\myVGA|Add1~15\ & VCC))
|
||
|
|
-- \myVGA|Add1~17\ = CARRY((\myVGA|v_px_count\(8) & !\myVGA|Add1~15\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add1~15\,
|
||
|
|
combout => \myVGA|Add1~16_combout\,
|
||
|
|
cout => \myVGA|Add1~17\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N27
|
||
|
|
\myVGA|v_px_count[8]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add1~16_combout\,
|
||
|
|
ena => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(8));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N28
|
||
|
|
\myVGA|Add1~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add1~18_combout\ = \myVGA|Add1~17\ $ (\myVGA|v_px_count\(9))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111111110000",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datad => \myVGA|v_px_count\(9),
|
||
|
|
cin => \myVGA|Add1~17\,
|
||
|
|
combout => \myVGA|Add1~18_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N0
|
||
|
|
\myVGA|v_px_count[9]~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|v_px_count[9]~2_combout\ = (\myVGA|v_px_count[1]~1_combout\ & ((\myVGA|Add1~18_combout\) # ((!\myVGA|v_px_count[9]~0_combout\ & \myVGA|v_px_count\(9))))) # (!\myVGA|v_px_count[1]~1_combout\ & (!\myVGA|v_px_count[9]~0_combout\ &
|
||
|
|
-- (\myVGA|v_px_count\(9))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1011101000110000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count[1]~1_combout\,
|
||
|
|
datab => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
datac => \myVGA|v_px_count\(9),
|
||
|
|
datad => \myVGA|Add1~18_combout\,
|
||
|
|
combout => \myVGA|v_px_count[9]~2_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N1
|
||
|
|
\myVGA|v_px_count[9]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|v_px_count[9]~2_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(9));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N6
|
||
|
|
\myVGA|Equal0~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Equal0~1_combout\ = (\myVGA|v_px_count\(0) & (\myVGA|v_px_count\(9) & (\myVGA|v_px_count\(2) & \myVGA|v_px_count\(3))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(0),
|
||
|
|
datab => \myVGA|v_px_count\(9),
|
||
|
|
datac => \myVGA|v_px_count\(2),
|
||
|
|
datad => \myVGA|v_px_count\(3),
|
||
|
|
combout => \myVGA|Equal0~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N8
|
||
|
|
\myVGA|Equal0~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Equal0~0_combout\ = (!\myVGA|v_px_count\(6) & (!\myVGA|v_px_count\(8) & (!\myVGA|v_px_count\(7) & !\myVGA|v_px_count\(5))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000000001",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(6),
|
||
|
|
datab => \myVGA|v_px_count\(8),
|
||
|
|
datac => \myVGA|v_px_count\(7),
|
||
|
|
datad => \myVGA|v_px_count\(5),
|
||
|
|
combout => \myVGA|Equal0~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N0
|
||
|
|
\myVGA|Equal0~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Equal0~2_combout\ = (\myVGA|Equal0~1_combout\ & (!\myVGA|v_px_count\(4) & (\myVGA|Equal0~0_combout\ & !\myVGA|v_px_count\(1))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000100000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Equal0~1_combout\,
|
||
|
|
datab => \myVGA|v_px_count\(4),
|
||
|
|
datac => \myVGA|Equal0~0_combout\,
|
||
|
|
datad => \myVGA|v_px_count\(1),
|
||
|
|
combout => \myVGA|Equal0~2_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N4
|
||
|
|
\myVGA|v_px_count[1]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|v_px_count[1]~1_combout\ = (!\myVGA|Equal0~2_combout\ & (!\myVGA|LessThan0~0_combout\ & (\myVGA|h_px_count\(9) & \rst~input_o\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0001000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Equal0~2_combout\,
|
||
|
|
datab => \myVGA|LessThan0~0_combout\,
|
||
|
|
datac => \myVGA|h_px_count\(9),
|
||
|
|
datad => \rst~input_o\,
|
||
|
|
combout => \myVGA|v_px_count[1]~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N6
|
||
|
|
\myVGA|v_px_count[1]~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|v_px_count[1]~5_combout\ = (\myVGA|v_px_count[1]~1_combout\ & ((\myVGA|Add1~2_combout\) # ((!\myVGA|v_px_count[9]~0_combout\ & \myVGA|v_px_count\(1))))) # (!\myVGA|v_px_count[1]~1_combout\ & (!\myVGA|v_px_count[9]~0_combout\ &
|
||
|
|
-- (\myVGA|v_px_count\(1))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1011101000110000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count[1]~1_combout\,
|
||
|
|
datab => \myVGA|v_px_count[9]~0_combout\,
|
||
|
|
datac => \myVGA|v_px_count\(1),
|
||
|
|
datad => \myVGA|Add1~2_combout\,
|
||
|
|
combout => \myVGA|v_px_count[1]~5_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X35_Y67_N7
|
||
|
|
\myVGA|v_px_count[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|v_px_count[1]~5_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|v_px_count\(1));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N2
|
||
|
|
\myVGA|Equal1~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Equal1~0_combout\ = (!\myVGA|v_px_count\(0) & (!\myVGA|v_px_count\(9) & (!\myVGA|v_px_count\(2) & !\myVGA|v_px_count\(3))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000000001",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(0),
|
||
|
|
datab => \myVGA|v_px_count\(9),
|
||
|
|
datac => \myVGA|v_px_count\(2),
|
||
|
|
datad => \myVGA|v_px_count\(3),
|
||
|
|
combout => \myVGA|Equal1~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N4
|
||
|
|
\myVGA|Equal1~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Equal1~1_combout\ = (!\myVGA|v_px_count\(1) & (\myVGA|Equal1~0_combout\ & (\myVGA|Equal0~0_combout\ & !\myVGA|v_px_count\(4))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(1),
|
||
|
|
datab => \myVGA|Equal1~0_combout\,
|
||
|
|
datac => \myVGA|Equal0~0_combout\,
|
||
|
|
datad => \myVGA|v_px_count\(4),
|
||
|
|
combout => \myVGA|Equal1~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N6
|
||
|
|
\myVGA|ball_bounce:count[0]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[0]~1_combout\ = \myVGA|ball_bounce:count[0]~q\ $ (VCC)
|
||
|
|
-- \myVGA|ball_bounce:count[0]~2\ = CARRY(\myVGA|ball_bounce:count[0]~q\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101010110101010",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_bounce:count[0]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|ball_bounce:count[0]~1_combout\,
|
||
|
|
cout => \myVGA|ball_bounce:count[0]~2\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N7
|
||
|
|
\myVGA|ball_bounce:count[0]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[0]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[0]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N8
|
||
|
|
\myVGA|ball_bounce:count[1]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[1]~1_combout\ = (\myVGA|ball_bounce:count[1]~q\ & (!\myVGA|ball_bounce:count[0]~2\)) # (!\myVGA|ball_bounce:count[1]~q\ & ((\myVGA|ball_bounce:count[0]~2\) # (GND)))
|
||
|
|
-- \myVGA|ball_bounce:count[1]~2\ = CARRY((!\myVGA|ball_bounce:count[0]~2\) # (!\myVGA|ball_bounce:count[1]~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_bounce:count[1]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_bounce:count[0]~2\,
|
||
|
|
combout => \myVGA|ball_bounce:count[1]~1_combout\,
|
||
|
|
cout => \myVGA|ball_bounce:count[1]~2\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N9
|
||
|
|
\myVGA|ball_bounce:count[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[1]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[1]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N10
|
||
|
|
\myVGA|ball_bounce:count[2]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[2]~1_combout\ = (\myVGA|ball_bounce:count[2]~q\ & (\myVGA|ball_bounce:count[1]~2\ $ (GND))) # (!\myVGA|ball_bounce:count[2]~q\ & (!\myVGA|ball_bounce:count[1]~2\ & VCC))
|
||
|
|
-- \myVGA|ball_bounce:count[2]~2\ = CARRY((\myVGA|ball_bounce:count[2]~q\ & !\myVGA|ball_bounce:count[1]~2\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_bounce:count[2]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_bounce:count[1]~2\,
|
||
|
|
combout => \myVGA|ball_bounce:count[2]~1_combout\,
|
||
|
|
cout => \myVGA|ball_bounce:count[2]~2\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N11
|
||
|
|
\myVGA|ball_bounce:count[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[2]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[2]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N12
|
||
|
|
\myVGA|ball_bounce:count[3]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[3]~1_combout\ = (\myVGA|ball_bounce:count[3]~q\ & (!\myVGA|ball_bounce:count[2]~2\)) # (!\myVGA|ball_bounce:count[3]~q\ & ((\myVGA|ball_bounce:count[2]~2\) # (GND)))
|
||
|
|
-- \myVGA|ball_bounce:count[3]~2\ = CARRY((!\myVGA|ball_bounce:count[2]~2\) # (!\myVGA|ball_bounce:count[3]~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_bounce:count[3]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_bounce:count[2]~2\,
|
||
|
|
combout => \myVGA|ball_bounce:count[3]~1_combout\,
|
||
|
|
cout => \myVGA|ball_bounce:count[3]~2\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N13
|
||
|
|
\myVGA|ball_bounce:count[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[3]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[3]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N14
|
||
|
|
\myVGA|ball_bounce:count[4]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[4]~1_combout\ = (\myVGA|ball_bounce:count[4]~q\ & (\myVGA|ball_bounce:count[3]~2\ $ (GND))) # (!\myVGA|ball_bounce:count[4]~q\ & (!\myVGA|ball_bounce:count[3]~2\ & VCC))
|
||
|
|
-- \myVGA|ball_bounce:count[4]~2\ = CARRY((\myVGA|ball_bounce:count[4]~q\ & !\myVGA|ball_bounce:count[3]~2\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_bounce:count[4]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_bounce:count[3]~2\,
|
||
|
|
combout => \myVGA|ball_bounce:count[4]~1_combout\,
|
||
|
|
cout => \myVGA|ball_bounce:count[4]~2\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N15
|
||
|
|
\myVGA|ball_bounce:count[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[4]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[4]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N16
|
||
|
|
\myVGA|ball_bounce:count[5]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[5]~1_combout\ = (\myVGA|ball_bounce:count[5]~q\ & (!\myVGA|ball_bounce:count[4]~2\)) # (!\myVGA|ball_bounce:count[5]~q\ & ((\myVGA|ball_bounce:count[4]~2\) # (GND)))
|
||
|
|
-- \myVGA|ball_bounce:count[5]~2\ = CARRY((!\myVGA|ball_bounce:count[4]~2\) # (!\myVGA|ball_bounce:count[5]~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_bounce:count[5]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_bounce:count[4]~2\,
|
||
|
|
combout => \myVGA|ball_bounce:count[5]~1_combout\,
|
||
|
|
cout => \myVGA|ball_bounce:count[5]~2\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N17
|
||
|
|
\myVGA|ball_bounce:count[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[5]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[5]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N18
|
||
|
|
\myVGA|ball_bounce:count[6]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[6]~1_combout\ = (\myVGA|ball_bounce:count[6]~q\ & (\myVGA|ball_bounce:count[5]~2\ $ (GND))) # (!\myVGA|ball_bounce:count[6]~q\ & (!\myVGA|ball_bounce:count[5]~2\ & VCC))
|
||
|
|
-- \myVGA|ball_bounce:count[6]~2\ = CARRY((\myVGA|ball_bounce:count[6]~q\ & !\myVGA|ball_bounce:count[5]~2\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_bounce:count[6]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_bounce:count[5]~2\,
|
||
|
|
combout => \myVGA|ball_bounce:count[6]~1_combout\,
|
||
|
|
cout => \myVGA|ball_bounce:count[6]~2\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N19
|
||
|
|
\myVGA|ball_bounce:count[6]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[6]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[6]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N24
|
||
|
|
\myVGA|LessThan7~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan7~0_combout\ = ((!\myVGA|ball_bounce:count[4]~q\ & ((!\myVGA|ball_bounce:count[2]~q\) # (!\myVGA|ball_bounce:count[3]~q\)))) # (!\myVGA|ball_bounce:count[5]~q\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011011100111111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_bounce:count[3]~q\,
|
||
|
|
datab => \myVGA|ball_bounce:count[5]~q\,
|
||
|
|
datac => \myVGA|ball_bounce:count[4]~q\,
|
||
|
|
datad => \myVGA|ball_bounce:count[2]~q\,
|
||
|
|
combout => \myVGA|LessThan7~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N20
|
||
|
|
\myVGA|ball_bounce:count[7]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[7]~1_combout\ = (\myVGA|ball_bounce:count[7]~q\ & (!\myVGA|ball_bounce:count[6]~2\)) # (!\myVGA|ball_bounce:count[7]~q\ & ((\myVGA|ball_bounce:count[6]~2\) # (GND)))
|
||
|
|
-- \myVGA|ball_bounce:count[7]~2\ = CARRY((!\myVGA|ball_bounce:count[6]~2\) # (!\myVGA|ball_bounce:count[7]~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_bounce:count[7]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_bounce:count[6]~2\,
|
||
|
|
combout => \myVGA|ball_bounce:count[7]~1_combout\,
|
||
|
|
cout => \myVGA|ball_bounce:count[7]~2\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N21
|
||
|
|
\myVGA|ball_bounce:count[7]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[7]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[7]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N22
|
||
|
|
\myVGA|ball_bounce:count[8]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:count[8]~1_combout\ = \myVGA|ball_bounce:count[8]~q\ $ (!\myVGA|ball_bounce:count[7]~2\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010110100101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_bounce:count[8]~q\,
|
||
|
|
cin => \myVGA|ball_bounce:count[7]~2\,
|
||
|
|
combout => \myVGA|ball_bounce:count[8]~1_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y69_N23
|
||
|
|
\myVGA|ball_bounce:count[8]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:count[8]~1_combout\,
|
||
|
|
sclr => \myVGA|LessThan7~1_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:count[8]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N2
|
||
|
|
\myVGA|LessThan7~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan7~1_combout\ = (\myVGA|ball_bounce:count[8]~q\ & ((\myVGA|ball_bounce:count[6]~q\) # ((\myVGA|ball_bounce:count[7]~q\) # (!\myVGA|LessThan7~0_combout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111000010110000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_bounce:count[6]~q\,
|
||
|
|
datab => \myVGA|LessThan7~0_combout\,
|
||
|
|
datac => \myVGA|ball_bounce:count[8]~q\,
|
||
|
|
datad => \myVGA|ball_bounce:count[7]~q\,
|
||
|
|
combout => \myVGA|LessThan7~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y69_N4
|
||
|
|
\myVGA|ball_b[0]~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[0]~7_combout\ = (\myVGA|Equal1~1_combout\ & \myVGA|LessThan7~1_combout\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datac => \myVGA|Equal1~1_combout\,
|
||
|
|
datad => \myVGA|LessThan7~1_combout\,
|
||
|
|
combout => \myVGA|ball_b[0]~7_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N3
|
||
|
|
\myVGA|ball_bounce:ball_speed_x[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:ball_speed_x[1]~0_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:ball_speed_x[1]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N8
|
||
|
|
\myVGA|ball_b[0]~24\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[0]~24_combout\ = !\myVGA|ball_b\(0)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111100001111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datac => \myVGA|ball_b\(0),
|
||
|
|
combout => \myVGA|ball_b[0]~24_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X28_Y68_N9
|
||
|
|
\myVGA|ball_b[0]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_b[0]~24_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_b\(0));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N8
|
||
|
|
\myVGA|ball_x[1]~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[1]~10_cout\ = CARRY(\myVGA|ball_b\(0))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000010101010",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_b\(0),
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|ball_x[1]~10_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N10
|
||
|
|
\myVGA|ball_x[1]~11\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[1]~11_combout\ = (\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(1) & (!\myVGA|ball_x[1]~10_cout\)) # (!\myVGA|ball_x\(1) & ((\myVGA|ball_x[1]~10_cout\) # (GND))))) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(1) &
|
||
|
|
-- (\myVGA|ball_x[1]~10_cout\ & VCC)) # (!\myVGA|ball_x\(1) & (!\myVGA|ball_x[1]~10_cout\))))
|
||
|
|
-- \myVGA|ball_x[1]~12\ = CARRY((\myVGA|ball_speed_x~0_combout\ & ((!\myVGA|ball_x[1]~10_cout\) # (!\myVGA|ball_x\(1)))) # (!\myVGA|ball_speed_x~0_combout\ & (!\myVGA|ball_x\(1) & !\myVGA|ball_x[1]~10_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
datab => \myVGA|ball_x\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_x[1]~10_cout\,
|
||
|
|
combout => \myVGA|ball_x[1]~11_combout\,
|
||
|
|
cout => \myVGA|ball_x[1]~12\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N11
|
||
|
|
\myVGA|ball_x[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[1]~11_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(1));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N12
|
||
|
|
\myVGA|ball_x[2]~13\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[2]~13_combout\ = ((\myVGA|ball_speed_x~0_combout\ $ (\myVGA|ball_x\(2) $ (\myVGA|ball_x[1]~12\)))) # (GND)
|
||
|
|
-- \myVGA|ball_x[2]~14\ = CARRY((\myVGA|ball_speed_x~0_combout\ & (\myVGA|ball_x\(2) & !\myVGA|ball_x[1]~12\)) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(2)) # (!\myVGA|ball_x[1]~12\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
datab => \myVGA|ball_x\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_x[1]~12\,
|
||
|
|
combout => \myVGA|ball_x[2]~13_combout\,
|
||
|
|
cout => \myVGA|ball_x[2]~14\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N13
|
||
|
|
\myVGA|ball_x[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[2]~13_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(2));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N14
|
||
|
|
\myVGA|ball_x[3]~15\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[3]~15_combout\ = (\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(3) & (!\myVGA|ball_x[2]~14\)) # (!\myVGA|ball_x\(3) & ((\myVGA|ball_x[2]~14\) # (GND))))) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(3) & (\myVGA|ball_x[2]~14\ &
|
||
|
|
-- VCC)) # (!\myVGA|ball_x\(3) & (!\myVGA|ball_x[2]~14\))))
|
||
|
|
-- \myVGA|ball_x[3]~16\ = CARRY((\myVGA|ball_speed_x~0_combout\ & ((!\myVGA|ball_x[2]~14\) # (!\myVGA|ball_x\(3)))) # (!\myVGA|ball_speed_x~0_combout\ & (!\myVGA|ball_x\(3) & !\myVGA|ball_x[2]~14\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
datab => \myVGA|ball_x\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_x[2]~14\,
|
||
|
|
combout => \myVGA|ball_x[3]~15_combout\,
|
||
|
|
cout => \myVGA|ball_x[3]~16\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N15
|
||
|
|
\myVGA|ball_x[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[3]~15_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(3));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N16
|
||
|
|
\myVGA|ball_x[4]~17\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[4]~17_combout\ = ((\myVGA|ball_speed_x~0_combout\ $ (\myVGA|ball_x\(4) $ (\myVGA|ball_x[3]~16\)))) # (GND)
|
||
|
|
-- \myVGA|ball_x[4]~18\ = CARRY((\myVGA|ball_speed_x~0_combout\ & (\myVGA|ball_x\(4) & !\myVGA|ball_x[3]~16\)) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(4)) # (!\myVGA|ball_x[3]~16\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
datab => \myVGA|ball_x\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_x[3]~16\,
|
||
|
|
combout => \myVGA|ball_x[4]~17_combout\,
|
||
|
|
cout => \myVGA|ball_x[4]~18\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N17
|
||
|
|
\myVGA|ball_x[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[4]~17_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(4));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N18
|
||
|
|
\myVGA|ball_x[5]~19\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[5]~19_combout\ = (\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(5) & (!\myVGA|ball_x[4]~18\)) # (!\myVGA|ball_x\(5) & ((\myVGA|ball_x[4]~18\) # (GND))))) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(5) & (\myVGA|ball_x[4]~18\ &
|
||
|
|
-- VCC)) # (!\myVGA|ball_x\(5) & (!\myVGA|ball_x[4]~18\))))
|
||
|
|
-- \myVGA|ball_x[5]~20\ = CARRY((\myVGA|ball_speed_x~0_combout\ & ((!\myVGA|ball_x[4]~18\) # (!\myVGA|ball_x\(5)))) # (!\myVGA|ball_speed_x~0_combout\ & (!\myVGA|ball_x\(5) & !\myVGA|ball_x[4]~18\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
datab => \myVGA|ball_x\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_x[4]~18\,
|
||
|
|
combout => \myVGA|ball_x[5]~19_combout\,
|
||
|
|
cout => \myVGA|ball_x[5]~20\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N19
|
||
|
|
\myVGA|ball_x[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[5]~19_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(5));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N20
|
||
|
|
\myVGA|Add19~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add19~0_combout\ = \myVGA|BALL_WIDTH\(0) $ (VCC)
|
||
|
|
-- \myVGA|Add19~1\ = CARRY(\myVGA|BALL_WIDTH\(0))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011001111001100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add19~0_combout\,
|
||
|
|
cout => \myVGA|Add19~1\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N21
|
||
|
|
\myVGA|vary_ball_width:count[9]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~18_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[9]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N2
|
||
|
|
\myVGA|Add18~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~0_combout\ = \myVGA|vary_ball_width:count[0]~q\ $ (VCC)
|
||
|
|
-- \myVGA|Add18~1\ = CARRY(\myVGA|vary_ball_width:count[0]~q\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011001111001100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|vary_ball_width:count[0]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add18~0_combout\,
|
||
|
|
cout => \myVGA|Add18~1\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N3
|
||
|
|
\myVGA|vary_ball_width:count[0]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~0_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[0]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N4
|
||
|
|
\myVGA|Add18~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~2_combout\ = (\myVGA|vary_ball_width:count[1]~q\ & (!\myVGA|Add18~1\)) # (!\myVGA|vary_ball_width:count[1]~q\ & ((\myVGA|Add18~1\) # (GND)))
|
||
|
|
-- \myVGA|Add18~3\ = CARRY((!\myVGA|Add18~1\) # (!\myVGA|vary_ball_width:count[1]~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|vary_ball_width:count[1]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add18~1\,
|
||
|
|
combout => \myVGA|Add18~2_combout\,
|
||
|
|
cout => \myVGA|Add18~3\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N5
|
||
|
|
\myVGA|vary_ball_width:count[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~2_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[1]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N6
|
||
|
|
\myVGA|Add18~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~4_combout\ = (\myVGA|vary_ball_width:count[2]~q\ & (\myVGA|Add18~3\ $ (GND))) # (!\myVGA|vary_ball_width:count[2]~q\ & (!\myVGA|Add18~3\ & VCC))
|
||
|
|
-- \myVGA|Add18~5\ = CARRY((\myVGA|vary_ball_width:count[2]~q\ & !\myVGA|Add18~3\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|vary_ball_width:count[2]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add18~3\,
|
||
|
|
combout => \myVGA|Add18~4_combout\,
|
||
|
|
cout => \myVGA|Add18~5\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N7
|
||
|
|
\myVGA|vary_ball_width:count[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~4_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[2]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N8
|
||
|
|
\myVGA|Add18~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~6_combout\ = (\myVGA|vary_ball_width:count[3]~q\ & (!\myVGA|Add18~5\)) # (!\myVGA|vary_ball_width:count[3]~q\ & ((\myVGA|Add18~5\) # (GND)))
|
||
|
|
-- \myVGA|Add18~7\ = CARRY((!\myVGA|Add18~5\) # (!\myVGA|vary_ball_width:count[3]~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|vary_ball_width:count[3]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add18~5\,
|
||
|
|
combout => \myVGA|Add18~6_combout\,
|
||
|
|
cout => \myVGA|Add18~7\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N9
|
||
|
|
\myVGA|vary_ball_width:count[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~6_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[3]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N10
|
||
|
|
\myVGA|Add18~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~8_combout\ = (\myVGA|vary_ball_width:count[4]~q\ & (\myVGA|Add18~7\ $ (GND))) # (!\myVGA|vary_ball_width:count[4]~q\ & (!\myVGA|Add18~7\ & VCC))
|
||
|
|
-- \myVGA|Add18~9\ = CARRY((\myVGA|vary_ball_width:count[4]~q\ & !\myVGA|Add18~7\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|vary_ball_width:count[4]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add18~7\,
|
||
|
|
combout => \myVGA|Add18~8_combout\,
|
||
|
|
cout => \myVGA|Add18~9\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N11
|
||
|
|
\myVGA|vary_ball_width:count[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~8_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[4]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N12
|
||
|
|
\myVGA|Add18~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~10_combout\ = (\myVGA|vary_ball_width:count[5]~q\ & (!\myVGA|Add18~9\)) # (!\myVGA|vary_ball_width:count[5]~q\ & ((\myVGA|Add18~9\) # (GND)))
|
||
|
|
-- \myVGA|Add18~11\ = CARRY((!\myVGA|Add18~9\) # (!\myVGA|vary_ball_width:count[5]~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|vary_ball_width:count[5]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add18~9\,
|
||
|
|
combout => \myVGA|Add18~10_combout\,
|
||
|
|
cout => \myVGA|Add18~11\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N13
|
||
|
|
\myVGA|vary_ball_width:count[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~10_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[5]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N14
|
||
|
|
\myVGA|Add18~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~12_combout\ = (\myVGA|vary_ball_width:count[6]~q\ & (\myVGA|Add18~11\ $ (GND))) # (!\myVGA|vary_ball_width:count[6]~q\ & (!\myVGA|Add18~11\ & VCC))
|
||
|
|
-- \myVGA|Add18~13\ = CARRY((\myVGA|vary_ball_width:count[6]~q\ & !\myVGA|Add18~11\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|vary_ball_width:count[6]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add18~11\,
|
||
|
|
combout => \myVGA|Add18~12_combout\,
|
||
|
|
cout => \myVGA|Add18~13\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N15
|
||
|
|
\myVGA|vary_ball_width:count[6]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~12_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[6]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N16
|
||
|
|
\myVGA|Add18~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~14_combout\ = (\myVGA|vary_ball_width:count[7]~q\ & (!\myVGA|Add18~13\)) # (!\myVGA|vary_ball_width:count[7]~q\ & ((\myVGA|Add18~13\) # (GND)))
|
||
|
|
-- \myVGA|Add18~15\ = CARRY((!\myVGA|Add18~13\) # (!\myVGA|vary_ball_width:count[7]~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|vary_ball_width:count[7]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add18~13\,
|
||
|
|
combout => \myVGA|Add18~14_combout\,
|
||
|
|
cout => \myVGA|Add18~15\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N17
|
||
|
|
\myVGA|vary_ball_width:count[7]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~14_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[7]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N18
|
||
|
|
\myVGA|Add18~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~16_combout\ = (\myVGA|vary_ball_width:count[8]~q\ & (\myVGA|Add18~15\ $ (GND))) # (!\myVGA|vary_ball_width:count[8]~q\ & (!\myVGA|Add18~15\ & VCC))
|
||
|
|
-- \myVGA|Add18~17\ = CARRY((\myVGA|vary_ball_width:count[8]~q\ & !\myVGA|Add18~15\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|vary_ball_width:count[8]~q\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add18~15\,
|
||
|
|
combout => \myVGA|Add18~16_combout\,
|
||
|
|
cout => \myVGA|Add18~17\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y69_N19
|
||
|
|
\myVGA|vary_ball_width:count[8]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add18~16_combout\,
|
||
|
|
ena => \myVGA|Equal1~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:count[8]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N20
|
||
|
|
\myVGA|Add18~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add18~18_combout\ = \myVGA|Add18~17\ $ (\myVGA|vary_ball_width:count[9]~q\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111111110000",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datad => \myVGA|vary_ball_width:count[9]~q\,
|
||
|
|
cin => \myVGA|Add18~17\,
|
||
|
|
combout => \myVGA|Add18~18_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N0
|
||
|
|
\myVGA|BALL_WIDTH[5]~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|BALL_WIDTH[5]~2_combout\ = (\myVGA|Add18~18_combout\ & \myVGA|Add18~16_combout\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010000010100000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add18~18_combout\,
|
||
|
|
datac => \myVGA|Add18~16_combout\,
|
||
|
|
combout => \myVGA|BALL_WIDTH[5]~2_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N22
|
||
|
|
\myVGA|BALL_WIDTH[5]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|BALL_WIDTH[5]~1_combout\ = (\myVGA|Add18~10_combout\ & (\myVGA|Add18~14_combout\ & (\myVGA|Add18~12_combout\ & \myVGA|Add18~8_combout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add18~10_combout\,
|
||
|
|
datab => \myVGA|Add18~14_combout\,
|
||
|
|
datac => \myVGA|Add18~12_combout\,
|
||
|
|
datad => \myVGA|Add18~8_combout\,
|
||
|
|
combout => \myVGA|BALL_WIDTH[5]~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N24
|
||
|
|
\myVGA|BALL_WIDTH[5]~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|BALL_WIDTH[5]~0_combout\ = (\myVGA|Add18~4_combout\ & (\myVGA|Add18~2_combout\ & (\myVGA|Add18~6_combout\ & \myVGA|Add18~0_combout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add18~4_combout\,
|
||
|
|
datab => \myVGA|Add18~2_combout\,
|
||
|
|
datac => \myVGA|Add18~6_combout\,
|
||
|
|
datad => \myVGA|Add18~0_combout\,
|
||
|
|
combout => \myVGA|BALL_WIDTH[5]~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y69_N26
|
||
|
|
\myVGA|BALL_WIDTH[5]~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|BALL_WIDTH[5]~3_combout\ = (\myVGA|Equal1~1_combout\ & (\myVGA|BALL_WIDTH[5]~2_combout\ & (\myVGA|BALL_WIDTH[5]~1_combout\ & \myVGA|BALL_WIDTH[5]~0_combout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Equal1~1_combout\,
|
||
|
|
datab => \myVGA|BALL_WIDTH[5]~2_combout\,
|
||
|
|
datac => \myVGA|BALL_WIDTH[5]~1_combout\,
|
||
|
|
datad => \myVGA|BALL_WIDTH[5]~0_combout\,
|
||
|
|
combout => \myVGA|BALL_WIDTH[5]~3_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X32_Y69_N21
|
||
|
|
\myVGA|BALL_WIDTH[0]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add19~0_combout\,
|
||
|
|
ena => \myVGA|BALL_WIDTH[5]~3_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|BALL_WIDTH\(0));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N22
|
||
|
|
\myVGA|Add19~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add19~2_combout\ = (\myVGA|BALL_WIDTH\(1) & ((\myVGA|growth~2_combout\ & (!\myVGA|Add19~1\)) # (!\myVGA|growth~2_combout\ & ((\myVGA|Add19~1\) # (GND))))) # (!\myVGA|BALL_WIDTH\(1) & ((\myVGA|growth~2_combout\ & (\myVGA|Add19~1\ & VCC)) #
|
||
|
|
-- (!\myVGA|growth~2_combout\ & (!\myVGA|Add19~1\))))
|
||
|
|
-- \myVGA|Add19~3\ = CARRY((\myVGA|BALL_WIDTH\(1) & ((!\myVGA|Add19~1\) # (!\myVGA|growth~2_combout\))) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|growth~2_combout\ & !\myVGA|Add19~1\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datab => \myVGA|growth~2_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add19~1\,
|
||
|
|
combout => \myVGA|Add19~2_combout\,
|
||
|
|
cout => \myVGA|Add19~3\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N2
|
||
|
|
\myVGA|BALL_WIDTH[1]~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|BALL_WIDTH[1]~5_combout\ = !\myVGA|Add19~2_combout\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111100001111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datac => \myVGA|Add19~2_combout\,
|
||
|
|
combout => \myVGA|BALL_WIDTH[1]~5_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X32_Y69_N3
|
||
|
|
\myVGA|BALL_WIDTH[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|BALL_WIDTH[1]~5_combout\,
|
||
|
|
ena => \myVGA|BALL_WIDTH[5]~3_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|BALL_WIDTH\(1));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N24
|
||
|
|
\myVGA|Add19~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add19~4_combout\ = ((\myVGA|BALL_WIDTH\(2) $ (\myVGA|growth~2_combout\ $ (!\myVGA|Add19~3\)))) # (GND)
|
||
|
|
-- \myVGA|Add19~5\ = CARRY((\myVGA|BALL_WIDTH\(2) & ((\myVGA|growth~2_combout\) # (!\myVGA|Add19~3\))) # (!\myVGA|BALL_WIDTH\(2) & (\myVGA|growth~2_combout\ & !\myVGA|Add19~3\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100110001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datab => \myVGA|growth~2_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add19~3\,
|
||
|
|
combout => \myVGA|Add19~4_combout\,
|
||
|
|
cout => \myVGA|Add19~5\);
|
||
|
|
|
||
|
|
-- Location: FF_X32_Y69_N25
|
||
|
|
\myVGA|BALL_WIDTH[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add19~4_combout\,
|
||
|
|
ena => \myVGA|BALL_WIDTH[5]~3_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|BALL_WIDTH\(2));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N0
|
||
|
|
\myVGA|growth~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|growth~0_combout\ = (\myVGA|BALL_WIDTH\(1)) # ((\myVGA|BALL_WIDTH\(2)) # (\myVGA|BALL_WIDTH\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111111111111100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datac => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datad => \myVGA|BALL_WIDTH\(0),
|
||
|
|
combout => \myVGA|growth~0_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X32_Y69_N5
|
||
|
|
\myVGA|vary_ball_width:growth[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|growth~2_combout\,
|
||
|
|
ena => \myVGA|BALL_WIDTH[5]~3_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|vary_ball_width:growth[1]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N26
|
||
|
|
\myVGA|Add19~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add19~6_combout\ = (\myVGA|growth~2_combout\ & ((\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add19~5\)) # (!\myVGA|BALL_WIDTH\(3) & (\myVGA|Add19~5\ & VCC)))) # (!\myVGA|growth~2_combout\ & ((\myVGA|BALL_WIDTH\(3) & ((\myVGA|Add19~5\) # (GND))) #
|
||
|
|
-- (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add19~5\))))
|
||
|
|
-- \myVGA|Add19~7\ = CARRY((\myVGA|growth~2_combout\ & (\myVGA|BALL_WIDTH\(3) & !\myVGA|Add19~5\)) # (!\myVGA|growth~2_combout\ & ((\myVGA|BALL_WIDTH\(3)) # (!\myVGA|Add19~5\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100101001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|growth~2_combout\,
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add19~5\,
|
||
|
|
combout => \myVGA|Add19~6_combout\,
|
||
|
|
cout => \myVGA|Add19~7\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N0
|
||
|
|
\myVGA|BALL_WIDTH[3]~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|BALL_WIDTH[3]~4_combout\ = !\myVGA|Add19~6_combout\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111100001111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datac => \myVGA|Add19~6_combout\,
|
||
|
|
combout => \myVGA|BALL_WIDTH[3]~4_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X32_Y69_N1
|
||
|
|
\myVGA|BALL_WIDTH[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|BALL_WIDTH[3]~4_combout\,
|
||
|
|
ena => \myVGA|BALL_WIDTH[5]~3_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|BALL_WIDTH\(3));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N28
|
||
|
|
\myVGA|Add19~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add19~8_combout\ = ((\myVGA|growth~2_combout\ $ (\myVGA|BALL_WIDTH\(4) $ (!\myVGA|Add19~7\)))) # (GND)
|
||
|
|
-- \myVGA|Add19~9\ = CARRY((\myVGA|growth~2_combout\ & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|Add19~7\))) # (!\myVGA|growth~2_combout\ & (\myVGA|BALL_WIDTH\(4) & !\myVGA|Add19~7\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100110001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|growth~2_combout\,
|
||
|
|
datab => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add19~7\,
|
||
|
|
combout => \myVGA|Add19~8_combout\,
|
||
|
|
cout => \myVGA|Add19~9\);
|
||
|
|
|
||
|
|
-- Location: FF_X32_Y69_N29
|
||
|
|
\myVGA|BALL_WIDTH[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add19~8_combout\,
|
||
|
|
ena => \myVGA|BALL_WIDTH[5]~3_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|BALL_WIDTH\(4));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N6
|
||
|
|
\myVGA|growth~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|growth~1_combout\ = (\myVGA|BALL_WIDTH\(3) & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|BALL_WIDTH\(5)))) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|BALL_WIDTH\(5) & \myVGA|BALL_WIDTH\(4)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100111100001100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datac => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datad => \myVGA|BALL_WIDTH\(4),
|
||
|
|
combout => \myVGA|growth~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N4
|
||
|
|
\myVGA|growth~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|growth~2_combout\ = (\myVGA|BALL_WIDTH\(5) & ((\myVGA|vary_ball_width:growth[1]~q\) # ((!\myVGA|growth~0_combout\ & \myVGA|growth~1_combout\)))) # (!\myVGA|BALL_WIDTH\(5) & (\myVGA|vary_ball_width:growth[1]~q\ & ((\myVGA|growth~0_combout\) #
|
||
|
|
-- (\myVGA|growth~1_combout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111001011100000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datab => \myVGA|growth~0_combout\,
|
||
|
|
datac => \myVGA|vary_ball_width:growth[1]~q\,
|
||
|
|
datad => \myVGA|growth~1_combout\,
|
||
|
|
combout => \myVGA|growth~2_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N30
|
||
|
|
\myVGA|Add19~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add19~10_combout\ = \myVGA|BALL_WIDTH\(5) $ (\myVGA|growth~2_combout\ $ (\myVGA|Add19~9\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011010010110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datab => \myVGA|growth~2_combout\,
|
||
|
|
cin => \myVGA|Add19~9\,
|
||
|
|
combout => \myVGA|Add19~10_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X32_Y69_N31
|
||
|
|
\myVGA|BALL_WIDTH[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|Add19~10_combout\,
|
||
|
|
ena => \myVGA|BALL_WIDTH[5]~3_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|BALL_WIDTH\(5));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N20
|
||
|
|
\myVGA|LessThan10~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan10~1_cout\ = CARRY((\myVGA|BALL_WIDTH\(0) & !\myVGA|ball_b\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000100010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datab => \myVGA|ball_b\(0),
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|LessThan10~1_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N22
|
||
|
|
\myVGA|LessThan10~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan10~3_cout\ = CARRY((\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1)) # (!\myVGA|LessThan10~1_cout\))) # (!\myVGA|ball_x\(1) & (\myVGA|BALL_WIDTH\(1) & !\myVGA|LessThan10~1_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000010001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(1),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan10~1_cout\,
|
||
|
|
cout => \myVGA|LessThan10~3_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N24
|
||
|
|
\myVGA|LessThan10~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan10~5_cout\ = CARRY((\myVGA|ball_x\(2) & (\myVGA|BALL_WIDTH\(2) & !\myVGA|LessThan10~3_cout\)) # (!\myVGA|ball_x\(2) & ((\myVGA|BALL_WIDTH\(2)) # (!\myVGA|LessThan10~3_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(2),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan10~3_cout\,
|
||
|
|
cout => \myVGA|LessThan10~5_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N26
|
||
|
|
\myVGA|LessThan10~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan10~7_cout\ = CARRY((\myVGA|ball_x\(3) & ((\myVGA|BALL_WIDTH\(3)) # (!\myVGA|LessThan10~5_cout\))) # (!\myVGA|ball_x\(3) & (\myVGA|BALL_WIDTH\(3) & !\myVGA|LessThan10~5_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000010001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(3),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan10~5_cout\,
|
||
|
|
cout => \myVGA|LessThan10~7_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N28
|
||
|
|
\myVGA|LessThan10~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan10~9_cout\ = CARRY((\myVGA|ball_x\(4) & (\myVGA|BALL_WIDTH\(4) & !\myVGA|LessThan10~7_cout\)) # (!\myVGA|ball_x\(4) & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|LessThan10~7_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(4),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan10~7_cout\,
|
||
|
|
cout => \myVGA|LessThan10~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N30
|
||
|
|
\myVGA|LessThan10~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan10~10_combout\ = (\myVGA|ball_x\(5) & (\myVGA|LessThan10~9_cout\ & \myVGA|BALL_WIDTH\(5))) # (!\myVGA|ball_x\(5) & ((\myVGA|LessThan10~9_cout\) # (\myVGA|BALL_WIDTH\(5))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111010101010000",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(5),
|
||
|
|
datad => \myVGA|BALL_WIDTH\(5),
|
||
|
|
cin => \myVGA|LessThan10~9_cout\,
|
||
|
|
combout => \myVGA|LessThan10~10_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N20
|
||
|
|
\myVGA|ball_x[6]~21\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[6]~21_combout\ = ((\myVGA|ball_speed_x~0_combout\ $ (\myVGA|ball_x\(6) $ (\myVGA|ball_x[5]~20\)))) # (GND)
|
||
|
|
-- \myVGA|ball_x[6]~22\ = CARRY((\myVGA|ball_speed_x~0_combout\ & (\myVGA|ball_x\(6) & !\myVGA|ball_x[5]~20\)) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(6)) # (!\myVGA|ball_x[5]~20\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
datab => \myVGA|ball_x\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_x[5]~20\,
|
||
|
|
combout => \myVGA|ball_x[6]~21_combout\,
|
||
|
|
cout => \myVGA|ball_x[6]~22\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N21
|
||
|
|
\myVGA|ball_x[6]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[6]~21_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(6));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N22
|
||
|
|
\myVGA|ball_x[7]~23\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[7]~23_combout\ = (\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(7) & (!\myVGA|ball_x[6]~22\)) # (!\myVGA|ball_x\(7) & ((\myVGA|ball_x[6]~22\) # (GND))))) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(7) & (\myVGA|ball_x[6]~22\ &
|
||
|
|
-- VCC)) # (!\myVGA|ball_x\(7) & (!\myVGA|ball_x[6]~22\))))
|
||
|
|
-- \myVGA|ball_x[7]~24\ = CARRY((\myVGA|ball_speed_x~0_combout\ & ((!\myVGA|ball_x[6]~22\) # (!\myVGA|ball_x\(7)))) # (!\myVGA|ball_speed_x~0_combout\ & (!\myVGA|ball_x\(7) & !\myVGA|ball_x[6]~22\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
datab => \myVGA|ball_x\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_x[6]~22\,
|
||
|
|
combout => \myVGA|ball_x[7]~23_combout\,
|
||
|
|
cout => \myVGA|ball_x[7]~24\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N23
|
||
|
|
\myVGA|ball_x[7]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[7]~23_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(7));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N0
|
||
|
|
\myVGA|LessThan10~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan10~12_combout\ = (!\myVGA|ball_x\(9) & (\myVGA|LessThan10~10_combout\ & (!\myVGA|ball_x\(7) & !\myVGA|ball_x\(6))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000000100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(9),
|
||
|
|
datab => \myVGA|LessThan10~10_combout\,
|
||
|
|
datac => \myVGA|ball_x\(7),
|
||
|
|
datad => \myVGA|ball_x\(6),
|
||
|
|
combout => \myVGA|LessThan10~12_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N8
|
||
|
|
\myVGA|Add3~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add3~0_combout\ = (\myVGA|BALL_WIDTH\(1) & (\myVGA|BALL_WIDTH\(0) $ (GND))) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|BALL_WIDTH\(0) & VCC))
|
||
|
|
-- \myVGA|Add3~1\ = CARRY((\myVGA|BALL_WIDTH\(1) & !\myVGA|BALL_WIDTH\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001100100100010",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add3~0_combout\,
|
||
|
|
cout => \myVGA|Add3~1\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N10
|
||
|
|
\myVGA|Add3~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add3~2_combout\ = (\myVGA|BALL_WIDTH\(2) & ((\myVGA|Add3~1\) # (GND))) # (!\myVGA|BALL_WIDTH\(2) & (!\myVGA|Add3~1\))
|
||
|
|
-- \myVGA|Add3~3\ = CARRY((\myVGA|BALL_WIDTH\(2)) # (!\myVGA|Add3~1\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001111001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add3~1\,
|
||
|
|
combout => \myVGA|Add3~2_combout\,
|
||
|
|
cout => \myVGA|Add3~3\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N12
|
||
|
|
\myVGA|Add3~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add3~4_combout\ = (\myVGA|BALL_WIDTH\(3) & (\myVGA|Add3~3\ $ (GND))) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add3~3\ & VCC))
|
||
|
|
-- \myVGA|Add3~5\ = CARRY((\myVGA|BALL_WIDTH\(3) & !\myVGA|Add3~3\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add3~3\,
|
||
|
|
combout => \myVGA|Add3~4_combout\,
|
||
|
|
cout => \myVGA|Add3~5\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N14
|
||
|
|
\myVGA|Add3~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add3~6_combout\ = (\myVGA|BALL_WIDTH\(4) & ((\myVGA|Add3~5\) # (GND))) # (!\myVGA|BALL_WIDTH\(4) & (!\myVGA|Add3~5\))
|
||
|
|
-- \myVGA|Add3~7\ = CARRY((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|Add3~5\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001111001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add3~5\,
|
||
|
|
combout => \myVGA|Add3~6_combout\,
|
||
|
|
cout => \myVGA|Add3~7\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N16
|
||
|
|
\myVGA|Add3~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add3~8_combout\ = (\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add3~7\ & VCC)) # (!\myVGA|BALL_WIDTH\(5) & (\myVGA|Add3~7\ $ (GND)))
|
||
|
|
-- \myVGA|Add3~9\ = CARRY((!\myVGA|BALL_WIDTH\(5) & !\myVGA|Add3~7\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101000000101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add3~7\,
|
||
|
|
combout => \myVGA|Add3~8_combout\,
|
||
|
|
cout => \myVGA|Add3~9\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N8
|
||
|
|
\myVGA|LessThan8~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~6_combout\ = (\myVGA|ball_x\(5) & (!\myVGA|ball_x\(4) & (\myVGA|Add3~6_combout\ & \myVGA|Add3~8_combout\))) # (!\myVGA|ball_x\(5) & ((\myVGA|Add3~8_combout\) # ((!\myVGA|ball_x\(4) & \myVGA|Add3~6_combout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0111001100010000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(4),
|
||
|
|
datab => \myVGA|ball_x\(5),
|
||
|
|
datac => \myVGA|Add3~6_combout\,
|
||
|
|
datad => \myVGA|Add3~8_combout\,
|
||
|
|
combout => \myVGA|LessThan8~6_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y69_N18
|
||
|
|
\myVGA|Add3~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add3~10_combout\ = !\myVGA|Add3~9\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111100001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
cin => \myVGA|Add3~9\,
|
||
|
|
combout => \myVGA|Add3~10_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N6
|
||
|
|
\myVGA|LessThan8~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~7_combout\ = (\myVGA|LessThan8~6_combout\ & (((!\myVGA|ball_x\(6) & !\myVGA|Add3~10_combout\)) # (!\myVGA|ball_x\(7)))) # (!\myVGA|LessThan8~6_combout\ & (!\myVGA|ball_x\(7) & ((!\myVGA|Add3~10_combout\) # (!\myVGA|ball_x\(6)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000101100101111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|LessThan8~6_combout\,
|
||
|
|
datab => \myVGA|ball_x\(6),
|
||
|
|
datac => \myVGA|ball_x\(7),
|
||
|
|
datad => \myVGA|Add3~10_combout\,
|
||
|
|
combout => \myVGA|LessThan8~7_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N24
|
||
|
|
\myVGA|ball_x[8]~25\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[8]~25_combout\ = ((\myVGA|ball_speed_x~0_combout\ $ (\myVGA|ball_x\(8) $ (\myVGA|ball_x[7]~24\)))) # (GND)
|
||
|
|
-- \myVGA|ball_x[8]~26\ = CARRY((\myVGA|ball_speed_x~0_combout\ & (\myVGA|ball_x\(8) & !\myVGA|ball_x[7]~24\)) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(8)) # (!\myVGA|ball_x[7]~24\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
datab => \myVGA|ball_x\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_x[7]~24\,
|
||
|
|
combout => \myVGA|ball_x[8]~25_combout\,
|
||
|
|
cout => \myVGA|ball_x[8]~26\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N25
|
||
|
|
\myVGA|ball_x[8]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[8]~25_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(8));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N6
|
||
|
|
\myVGA|LessThan8~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~0_combout\ = \myVGA|ball_x\(5) $ (\myVGA|Add3~8_combout\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011001111001100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_x\(5),
|
||
|
|
datad => \myVGA|Add3~8_combout\,
|
||
|
|
combout => \myVGA|LessThan8~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N28
|
||
|
|
\myVGA|LessThan8~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~1_combout\ = (!\myVGA|LessThan8~0_combout\ & ((\myVGA|Add3~10_combout\ & (!\myVGA|ball_x\(7) & \myVGA|ball_x\(6))) # (!\myVGA|Add3~10_combout\ & (\myVGA|ball_x\(7) & !\myVGA|ball_x\(6)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000001000010000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add3~10_combout\,
|
||
|
|
datab => \myVGA|LessThan8~0_combout\,
|
||
|
|
datac => \myVGA|ball_x\(7),
|
||
|
|
datad => \myVGA|ball_x\(6),
|
||
|
|
combout => \myVGA|LessThan8~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N2
|
||
|
|
\myVGA|LessThan8~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~2_combout\ = (\myVGA|ball_x\(1) & (\myVGA|BALL_WIDTH\(0) & (\myVGA|Add3~0_combout\ & !\myVGA|ball_b\(0)))) # (!\myVGA|ball_x\(1) & ((\myVGA|Add3~0_combout\) # ((\myVGA|BALL_WIDTH\(0) & !\myVGA|ball_b\(0)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101000011010100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(1),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datac => \myVGA|Add3~0_combout\,
|
||
|
|
datad => \myVGA|ball_b\(0),
|
||
|
|
combout => \myVGA|LessThan8~2_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N26
|
||
|
|
\myVGA|LessThan8~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~3_combout\ = (\myVGA|ball_x\(2) & (\myVGA|LessThan8~2_combout\ & \myVGA|Add3~2_combout\)) # (!\myVGA|ball_x\(2) & ((\myVGA|LessThan8~2_combout\) # (\myVGA|Add3~2_combout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1101110101000100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(2),
|
||
|
|
datab => \myVGA|LessThan8~2_combout\,
|
||
|
|
datad => \myVGA|Add3~2_combout\,
|
||
|
|
combout => \myVGA|LessThan8~3_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N28
|
||
|
|
\myVGA|LessThan8~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~4_combout\ = (\myVGA|LessThan8~3_combout\ & ((\myVGA|Add3~4_combout\) # (!\myVGA|ball_x\(3)))) # (!\myVGA|LessThan8~3_combout\ & (\myVGA|Add3~4_combout\ & !\myVGA|ball_x\(3)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010000011111010",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|LessThan8~3_combout\,
|
||
|
|
datac => \myVGA|Add3~4_combout\,
|
||
|
|
datad => \myVGA|ball_x\(3),
|
||
|
|
combout => \myVGA|LessThan8~4_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N30
|
||
|
|
\myVGA|LessThan8~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~5_combout\ = (\myVGA|LessThan8~1_combout\ & (\myVGA|LessThan8~4_combout\ & (\myVGA|ball_x\(4) $ (!\myVGA|Add3~6_combout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000010000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(4),
|
||
|
|
datab => \myVGA|LessThan8~1_combout\,
|
||
|
|
datac => \myVGA|Add3~6_combout\,
|
||
|
|
datad => \myVGA|LessThan8~4_combout\,
|
||
|
|
combout => \myVGA|LessThan8~5_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N4
|
||
|
|
\myVGA|LessThan8~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan8~8_combout\ = ((!\myVGA|ball_x\(8) & ((\myVGA|LessThan8~7_combout\) # (\myVGA|LessThan8~5_combout\)))) # (!\myVGA|ball_x\(9))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011001011111111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|LessThan8~7_combout\,
|
||
|
|
datab => \myVGA|ball_x\(8),
|
||
|
|
datac => \myVGA|LessThan8~5_combout\,
|
||
|
|
datad => \myVGA|ball_x\(9),
|
||
|
|
combout => \myVGA|LessThan8~8_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N30
|
||
|
|
\myVGA|ball_speed_x~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_speed_x~0_combout\ = (\myVGA|LessThan10~12_combout\ & ((\myVGA|ball_bounce:ball_speed_x[1]~q\ $ (\myVGA|LessThan8~8_combout\)) # (!\myVGA|ball_x\(8)))) # (!\myVGA|LessThan10~12_combout\ & (\myVGA|ball_bounce:ball_speed_x[1]~q\ $
|
||
|
|
-- ((\myVGA|LessThan8~8_combout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101011011110",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_bounce:ball_speed_x[1]~q\,
|
||
|
|
datab => \myVGA|LessThan10~12_combout\,
|
||
|
|
datac => \myVGA|LessThan8~8_combout\,
|
||
|
|
datad => \myVGA|ball_x\(8),
|
||
|
|
combout => \myVGA|ball_speed_x~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y68_N26
|
||
|
|
\myVGA|ball_x[9]~27\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_x[9]~27_combout\ = \myVGA|ball_x\(9) $ (\myVGA|ball_x[8]~26\ $ (!\myVGA|ball_speed_x~0_combout\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101010100101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(9),
|
||
|
|
datad => \myVGA|ball_speed_x~0_combout\,
|
||
|
|
cin => \myVGA|ball_x[8]~26\,
|
||
|
|
combout => \myVGA|ball_x[9]~27_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X31_Y68_N27
|
||
|
|
\myVGA|ball_x[9]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_x[9]~27_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_x\(9));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N10
|
||
|
|
\myVGA|Add14~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~0_combout\ = (\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) $ (VCC))) # (!\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) & VCC))
|
||
|
|
-- \myVGA|Add14~1\ = CARRY((\myVGA|BALL_WIDTH\(0) & \myVGA|ball_b\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110011010001000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datab => \myVGA|ball_b\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add14~0_combout\,
|
||
|
|
cout => \myVGA|Add14~1\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N12
|
||
|
|
\myVGA|Add14~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~2_combout\ = (\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add14~1\)) # (!\myVGA|BALL_WIDTH\(1) & (\myVGA|Add14~1\ & VCC)))) # (!\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1) & ((\myVGA|Add14~1\) # (GND))) # (!\myVGA|BALL_WIDTH\(1) &
|
||
|
|
-- (!\myVGA|Add14~1\))))
|
||
|
|
-- \myVGA|Add14~3\ = CARRY((\myVGA|ball_x\(1) & (\myVGA|BALL_WIDTH\(1) & !\myVGA|Add14~1\)) # (!\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1)) # (!\myVGA|Add14~1\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100101001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(1),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~1\,
|
||
|
|
combout => \myVGA|Add14~2_combout\,
|
||
|
|
cout => \myVGA|Add14~3\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N14
|
||
|
|
\myVGA|Add14~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~4_combout\ = ((\myVGA|BALL_WIDTH\(2) $ (\myVGA|ball_x\(2) $ (!\myVGA|Add14~3\)))) # (GND)
|
||
|
|
-- \myVGA|Add14~5\ = CARRY((\myVGA|BALL_WIDTH\(2) & ((\myVGA|ball_x\(2)) # (!\myVGA|Add14~3\))) # (!\myVGA|BALL_WIDTH\(2) & (\myVGA|ball_x\(2) & !\myVGA|Add14~3\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100110001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datab => \myVGA|ball_x\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~3\,
|
||
|
|
combout => \myVGA|Add14~4_combout\,
|
||
|
|
cout => \myVGA|Add14~5\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N16
|
||
|
|
\myVGA|Add14~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~6_combout\ = (\myVGA|BALL_WIDTH\(3) & ((\myVGA|ball_x\(3) & (!\myVGA|Add14~5\)) # (!\myVGA|ball_x\(3) & ((\myVGA|Add14~5\) # (GND))))) # (!\myVGA|BALL_WIDTH\(3) & ((\myVGA|ball_x\(3) & (\myVGA|Add14~5\ & VCC)) # (!\myVGA|ball_x\(3) &
|
||
|
|
-- (!\myVGA|Add14~5\))))
|
||
|
|
-- \myVGA|Add14~7\ = CARRY((\myVGA|BALL_WIDTH\(3) & ((!\myVGA|Add14~5\) # (!\myVGA|ball_x\(3)))) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|ball_x\(3) & !\myVGA|Add14~5\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datab => \myVGA|ball_x\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~5\,
|
||
|
|
combout => \myVGA|Add14~6_combout\,
|
||
|
|
cout => \myVGA|Add14~7\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N18
|
||
|
|
\myVGA|Add14~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~8_combout\ = ((\myVGA|BALL_WIDTH\(4) $ (\myVGA|ball_x\(4) $ (!\myVGA|Add14~7\)))) # (GND)
|
||
|
|
-- \myVGA|Add14~9\ = CARRY((\myVGA|BALL_WIDTH\(4) & ((\myVGA|ball_x\(4)) # (!\myVGA|Add14~7\))) # (!\myVGA|BALL_WIDTH\(4) & (\myVGA|ball_x\(4) & !\myVGA|Add14~7\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100110001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datab => \myVGA|ball_x\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~7\,
|
||
|
|
combout => \myVGA|Add14~8_combout\,
|
||
|
|
cout => \myVGA|Add14~9\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N20
|
||
|
|
\myVGA|Add14~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~10_combout\ = (\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5) & (\myVGA|Add14~9\ & VCC)) # (!\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add14~9\)))) # (!\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add14~9\)) # (!\myVGA|BALL_WIDTH\(5) &
|
||
|
|
-- ((\myVGA|Add14~9\) # (GND)))))
|
||
|
|
-- \myVGA|Add14~11\ = CARRY((\myVGA|ball_x\(5) & (!\myVGA|BALL_WIDTH\(5) & !\myVGA|Add14~9\)) # (!\myVGA|ball_x\(5) & ((!\myVGA|Add14~9\) # (!\myVGA|BALL_WIDTH\(5)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000010111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(5),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~9\,
|
||
|
|
combout => \myVGA|Add14~10_combout\,
|
||
|
|
cout => \myVGA|Add14~11\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N22
|
||
|
|
\myVGA|Add14~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~12_combout\ = (\myVGA|ball_x\(6) & (\myVGA|Add14~11\ $ (GND))) # (!\myVGA|ball_x\(6) & (!\myVGA|Add14~11\ & VCC))
|
||
|
|
-- \myVGA|Add14~13\ = CARRY((\myVGA|ball_x\(6) & !\myVGA|Add14~11\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_x\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~11\,
|
||
|
|
combout => \myVGA|Add14~12_combout\,
|
||
|
|
cout => \myVGA|Add14~13\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N24
|
||
|
|
\myVGA|Add14~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~14_combout\ = (\myVGA|ball_x\(7) & (!\myVGA|Add14~13\)) # (!\myVGA|ball_x\(7) & ((\myVGA|Add14~13\) # (GND)))
|
||
|
|
-- \myVGA|Add14~15\ = CARRY((!\myVGA|Add14~13\) # (!\myVGA|ball_x\(7)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~13\,
|
||
|
|
combout => \myVGA|Add14~14_combout\,
|
||
|
|
cout => \myVGA|Add14~15\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N26
|
||
|
|
\myVGA|Add14~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~16_combout\ = (\myVGA|ball_x\(8) & (\myVGA|Add14~15\ $ (GND))) # (!\myVGA|ball_x\(8) & (!\myVGA|Add14~15\ & VCC))
|
||
|
|
-- \myVGA|Add14~17\ = CARRY((\myVGA|ball_x\(8) & !\myVGA|Add14~15\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~15\,
|
||
|
|
combout => \myVGA|Add14~16_combout\,
|
||
|
|
cout => \myVGA|Add14~17\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N28
|
||
|
|
\myVGA|Add14~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~18_combout\ = (\myVGA|ball_x\(9) & (!\myVGA|Add14~17\)) # (!\myVGA|ball_x\(9) & ((\myVGA|Add14~17\) # (GND)))
|
||
|
|
-- \myVGA|Add14~19\ = CARRY((!\myVGA|Add14~17\) # (!\myVGA|ball_x\(9)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(9),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add14~17\,
|
||
|
|
combout => \myVGA|Add14~18_combout\,
|
||
|
|
cout => \myVGA|Add14~19\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N0
|
||
|
|
\myVGA|LessThan12~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~1_cout\ = CARRY((\myVGA|Add14~0_combout\ & !\myVGA|h_px_count\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000100010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add14~0_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(0),
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|LessThan12~1_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N2
|
||
|
|
\myVGA|LessThan12~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~3_cout\ = CARRY((\myVGA|Add14~2_combout\ & (\myVGA|h_px_count\(1) & !\myVGA|LessThan12~1_cout\)) # (!\myVGA|Add14~2_combout\ & ((\myVGA|h_px_count\(1)) # (!\myVGA|LessThan12~1_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add14~2_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan12~1_cout\,
|
||
|
|
cout => \myVGA|LessThan12~3_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N4
|
||
|
|
\myVGA|LessThan12~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~5_cout\ = CARRY((\myVGA|Add14~4_combout\ & ((!\myVGA|LessThan12~3_cout\) # (!\myVGA|h_px_count\(2)))) # (!\myVGA|Add14~4_combout\ & (!\myVGA|h_px_count\(2) & !\myVGA|LessThan12~3_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add14~4_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan12~3_cout\,
|
||
|
|
cout => \myVGA|LessThan12~5_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N6
|
||
|
|
\myVGA|LessThan12~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~7_cout\ = CARRY((\myVGA|Add14~6_combout\ & (\myVGA|h_px_count\(3) & !\myVGA|LessThan12~5_cout\)) # (!\myVGA|Add14~6_combout\ & ((\myVGA|h_px_count\(3)) # (!\myVGA|LessThan12~5_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add14~6_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan12~5_cout\,
|
||
|
|
cout => \myVGA|LessThan12~7_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N8
|
||
|
|
\myVGA|LessThan12~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~9_cout\ = CARRY((\myVGA|h_px_count\(4) & (\myVGA|Add14~8_combout\ & !\myVGA|LessThan12~7_cout\)) # (!\myVGA|h_px_count\(4) & ((\myVGA|Add14~8_combout\) # (!\myVGA|LessThan12~7_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(4),
|
||
|
|
datab => \myVGA|Add14~8_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan12~7_cout\,
|
||
|
|
cout => \myVGA|LessThan12~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N10
|
||
|
|
\myVGA|LessThan12~11\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~11_cout\ = CARRY((\myVGA|h_px_count\(5) & ((!\myVGA|LessThan12~9_cout\) # (!\myVGA|Add14~10_combout\))) # (!\myVGA|h_px_count\(5) & (!\myVGA|Add14~10_combout\ & !\myVGA|LessThan12~9_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(5),
|
||
|
|
datab => \myVGA|Add14~10_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan12~9_cout\,
|
||
|
|
cout => \myVGA|LessThan12~11_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N12
|
||
|
|
\myVGA|LessThan12~13\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~13_cout\ = CARRY((\myVGA|h_px_count\(6) & (\myVGA|Add14~12_combout\ & !\myVGA|LessThan12~11_cout\)) # (!\myVGA|h_px_count\(6) & ((\myVGA|Add14~12_combout\) # (!\myVGA|LessThan12~11_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(6),
|
||
|
|
datab => \myVGA|Add14~12_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan12~11_cout\,
|
||
|
|
cout => \myVGA|LessThan12~13_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N14
|
||
|
|
\myVGA|LessThan12~15\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~15_cout\ = CARRY((\myVGA|Add14~14_combout\ & (\myVGA|h_px_count\(7) & !\myVGA|LessThan12~13_cout\)) # (!\myVGA|Add14~14_combout\ & ((\myVGA|h_px_count\(7)) # (!\myVGA|LessThan12~13_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add14~14_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan12~13_cout\,
|
||
|
|
cout => \myVGA|LessThan12~15_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N16
|
||
|
|
\myVGA|LessThan12~17\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~17_cout\ = CARRY((\myVGA|Add14~16_combout\ & ((!\myVGA|LessThan12~15_cout\) # (!\myVGA|h_px_count\(8)))) # (!\myVGA|Add14~16_combout\ & (!\myVGA|h_px_count\(8) & !\myVGA|LessThan12~15_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add14~16_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan12~15_cout\,
|
||
|
|
cout => \myVGA|LessThan12~17_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N18
|
||
|
|
\myVGA|LessThan12~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan12~18_combout\ = (\myVGA|h_px_count\(9) & (\myVGA|Add14~18_combout\ & \myVGA|LessThan12~17_cout\)) # (!\myVGA|h_px_count\(9) & ((\myVGA|Add14~18_combout\) # (\myVGA|LessThan12~17_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1101010011010100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(9),
|
||
|
|
datab => \myVGA|Add14~18_combout\,
|
||
|
|
cin => \myVGA|LessThan12~17_cout\,
|
||
|
|
combout => \myVGA|LessThan12~18_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N14
|
||
|
|
\myVGA|ball_y[1]~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[1]~9_cout\ = CARRY(\myVGA|ball_b\(0))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000011001100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_b\(0),
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|ball_y[1]~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N16
|
||
|
|
\myVGA|ball_y[1]~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[1]~10_combout\ = (\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(1) & (!\myVGA|ball_y[1]~9_cout\)) # (!\myVGA|ball_y\(1) & ((\myVGA|ball_y[1]~9_cout\) # (GND))))) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(1) &
|
||
|
|
-- (\myVGA|ball_y[1]~9_cout\ & VCC)) # (!\myVGA|ball_y\(1) & (!\myVGA|ball_y[1]~9_cout\))))
|
||
|
|
-- \myVGA|ball_y[1]~11\ = CARRY((\myVGA|ball_speed_y~1_combout\ & ((!\myVGA|ball_y[1]~9_cout\) # (!\myVGA|ball_y\(1)))) # (!\myVGA|ball_speed_y~1_combout\ & (!\myVGA|ball_y\(1) & !\myVGA|ball_y[1]~9_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
datab => \myVGA|ball_y\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_y[1]~9_cout\,
|
||
|
|
combout => \myVGA|ball_y[1]~10_combout\,
|
||
|
|
cout => \myVGA|ball_y[1]~11\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N17
|
||
|
|
\myVGA|ball_y[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_y[1]~10_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_y\(1));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N18
|
||
|
|
\myVGA|ball_y[2]~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[2]~12_combout\ = ((\myVGA|ball_speed_y~1_combout\ $ (\myVGA|ball_y\(2) $ (\myVGA|ball_y[1]~11\)))) # (GND)
|
||
|
|
-- \myVGA|ball_y[2]~13\ = CARRY((\myVGA|ball_speed_y~1_combout\ & (\myVGA|ball_y\(2) & !\myVGA|ball_y[1]~11\)) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(2)) # (!\myVGA|ball_y[1]~11\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
datab => \myVGA|ball_y\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_y[1]~11\,
|
||
|
|
combout => \myVGA|ball_y[2]~12_combout\,
|
||
|
|
cout => \myVGA|ball_y[2]~13\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N19
|
||
|
|
\myVGA|ball_y[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_y[2]~12_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_y\(2));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N20
|
||
|
|
\myVGA|ball_y[3]~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[3]~14_combout\ = (\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(3) & (!\myVGA|ball_y[2]~13\)) # (!\myVGA|ball_y\(3) & ((\myVGA|ball_y[2]~13\) # (GND))))) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(3) & (\myVGA|ball_y[2]~13\ &
|
||
|
|
-- VCC)) # (!\myVGA|ball_y\(3) & (!\myVGA|ball_y[2]~13\))))
|
||
|
|
-- \myVGA|ball_y[3]~15\ = CARRY((\myVGA|ball_speed_y~1_combout\ & ((!\myVGA|ball_y[2]~13\) # (!\myVGA|ball_y\(3)))) # (!\myVGA|ball_speed_y~1_combout\ & (!\myVGA|ball_y\(3) & !\myVGA|ball_y[2]~13\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
datab => \myVGA|ball_y\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_y[2]~13\,
|
||
|
|
combout => \myVGA|ball_y[3]~14_combout\,
|
||
|
|
cout => \myVGA|ball_y[3]~15\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N21
|
||
|
|
\myVGA|ball_y[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_y[3]~14_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_y\(3));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N22
|
||
|
|
\myVGA|ball_y[4]~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[4]~16_combout\ = ((\myVGA|ball_speed_y~1_combout\ $ (\myVGA|ball_y\(4) $ (\myVGA|ball_y[3]~15\)))) # (GND)
|
||
|
|
-- \myVGA|ball_y[4]~17\ = CARRY((\myVGA|ball_speed_y~1_combout\ & (\myVGA|ball_y\(4) & !\myVGA|ball_y[3]~15\)) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(4)) # (!\myVGA|ball_y[3]~15\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
datab => \myVGA|ball_y\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_y[3]~15\,
|
||
|
|
combout => \myVGA|ball_y[4]~16_combout\,
|
||
|
|
cout => \myVGA|ball_y[4]~17\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N23
|
||
|
|
\myVGA|ball_y[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_y[4]~16_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_y\(4));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N24
|
||
|
|
\myVGA|ball_y[5]~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[5]~18_combout\ = (\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(5) & (!\myVGA|ball_y[4]~17\)) # (!\myVGA|ball_y\(5) & ((\myVGA|ball_y[4]~17\) # (GND))))) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(5) & (\myVGA|ball_y[4]~17\ &
|
||
|
|
-- VCC)) # (!\myVGA|ball_y\(5) & (!\myVGA|ball_y[4]~17\))))
|
||
|
|
-- \myVGA|ball_y[5]~19\ = CARRY((\myVGA|ball_speed_y~1_combout\ & ((!\myVGA|ball_y[4]~17\) # (!\myVGA|ball_y\(5)))) # (!\myVGA|ball_speed_y~1_combout\ & (!\myVGA|ball_y\(5) & !\myVGA|ball_y[4]~17\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
datab => \myVGA|ball_y\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_y[4]~17\,
|
||
|
|
combout => \myVGA|ball_y[5]~18_combout\,
|
||
|
|
cout => \myVGA|ball_y[5]~19\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N25
|
||
|
|
\myVGA|ball_y[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_y[5]~18_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_y\(5));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N26
|
||
|
|
\myVGA|ball_y[6]~20\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[6]~20_combout\ = ((\myVGA|ball_y\(6) $ (\myVGA|ball_speed_y~1_combout\ $ (\myVGA|ball_y[5]~19\)))) # (GND)
|
||
|
|
-- \myVGA|ball_y[6]~21\ = CARRY((\myVGA|ball_y\(6) & ((!\myVGA|ball_y[5]~19\) # (!\myVGA|ball_speed_y~1_combout\))) # (!\myVGA|ball_y\(6) & (!\myVGA|ball_speed_y~1_combout\ & !\myVGA|ball_y[5]~19\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(6),
|
||
|
|
datab => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_y[5]~19\,
|
||
|
|
combout => \myVGA|ball_y[6]~20_combout\,
|
||
|
|
cout => \myVGA|ball_y[6]~21\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N27
|
||
|
|
\myVGA|ball_y[6]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_y[6]~20_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_y\(6));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N0
|
||
|
|
\myVGA|LessThan11~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan11~1_cout\ = CARRY((\myVGA|BALL_WIDTH\(0) & !\myVGA|ball_b\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000100010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datab => \myVGA|ball_b\(0),
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|LessThan11~1_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N2
|
||
|
|
\myVGA|LessThan11~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan11~3_cout\ = CARRY((\myVGA|BALL_WIDTH\(1) & ((\myVGA|ball_y\(1)) # (!\myVGA|LessThan11~1_cout\))) # (!\myVGA|BALL_WIDTH\(1) & (\myVGA|ball_y\(1) & !\myVGA|LessThan11~1_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000010001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datab => \myVGA|ball_y\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan11~1_cout\,
|
||
|
|
cout => \myVGA|LessThan11~3_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N4
|
||
|
|
\myVGA|LessThan11~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan11~5_cout\ = CARRY((\myVGA|BALL_WIDTH\(2) & ((!\myVGA|LessThan11~3_cout\) # (!\myVGA|ball_y\(2)))) # (!\myVGA|BALL_WIDTH\(2) & (!\myVGA|ball_y\(2) & !\myVGA|LessThan11~3_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datab => \myVGA|ball_y\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan11~3_cout\,
|
||
|
|
cout => \myVGA|LessThan11~5_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N6
|
||
|
|
\myVGA|LessThan11~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan11~7_cout\ = CARRY((\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3)) # (!\myVGA|LessThan11~5_cout\))) # (!\myVGA|ball_y\(3) & (\myVGA|BALL_WIDTH\(3) & !\myVGA|LessThan11~5_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000010001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(3),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan11~5_cout\,
|
||
|
|
cout => \myVGA|LessThan11~7_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N8
|
||
|
|
\myVGA|LessThan11~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan11~9_cout\ = CARRY((\myVGA|ball_y\(4) & (\myVGA|BALL_WIDTH\(4) & !\myVGA|LessThan11~7_cout\)) # (!\myVGA|ball_y\(4) & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|LessThan11~7_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(4),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan11~7_cout\,
|
||
|
|
cout => \myVGA|LessThan11~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N10
|
||
|
|
\myVGA|LessThan11~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan11~10_combout\ = (\myVGA|BALL_WIDTH\(5) & ((\myVGA|LessThan11~9_cout\) # (!\myVGA|ball_y\(5)))) # (!\myVGA|BALL_WIDTH\(5) & (!\myVGA|ball_y\(5) & \myVGA|LessThan11~9_cout\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1011001010110010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datab => \myVGA|ball_y\(5),
|
||
|
|
cin => \myVGA|LessThan11~9_cout\,
|
||
|
|
combout => \myVGA|LessThan11~10_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N6
|
||
|
|
\myVGA|Add5~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add5~0_combout\ = (\myVGA|BALL_WIDTH\(1) & (\myVGA|BALL_WIDTH\(0) $ (GND))) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|BALL_WIDTH\(0) & VCC))
|
||
|
|
-- \myVGA|Add5~1\ = CARRY((\myVGA|BALL_WIDTH\(1) & !\myVGA|BALL_WIDTH\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001100100100010",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add5~0_combout\,
|
||
|
|
cout => \myVGA|Add5~1\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N8
|
||
|
|
\myVGA|Add5~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add5~2_combout\ = (\myVGA|BALL_WIDTH\(2) & ((\myVGA|Add5~1\) # (GND))) # (!\myVGA|BALL_WIDTH\(2) & (!\myVGA|Add5~1\))
|
||
|
|
-- \myVGA|Add5~3\ = CARRY((\myVGA|BALL_WIDTH\(2)) # (!\myVGA|Add5~1\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001111001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add5~1\,
|
||
|
|
combout => \myVGA|Add5~2_combout\,
|
||
|
|
cout => \myVGA|Add5~3\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N10
|
||
|
|
\myVGA|Add5~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add5~4_combout\ = (\myVGA|BALL_WIDTH\(3) & (\myVGA|Add5~3\ $ (GND))) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add5~3\ & VCC))
|
||
|
|
-- \myVGA|Add5~5\ = CARRY((\myVGA|BALL_WIDTH\(3) & !\myVGA|Add5~3\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add5~3\,
|
||
|
|
combout => \myVGA|Add5~4_combout\,
|
||
|
|
cout => \myVGA|Add5~5\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N12
|
||
|
|
\myVGA|Add5~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add5~6_combout\ = (\myVGA|BALL_WIDTH\(4) & ((\myVGA|Add5~5\) # (GND))) # (!\myVGA|BALL_WIDTH\(4) & (!\myVGA|Add5~5\))
|
||
|
|
-- \myVGA|Add5~7\ = CARRY((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|Add5~5\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001111001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add5~5\,
|
||
|
|
combout => \myVGA|Add5~6_combout\,
|
||
|
|
cout => \myVGA|Add5~7\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N14
|
||
|
|
\myVGA|Add5~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add5~8_combout\ = (\myVGA|BALL_WIDTH\(5) & (\myVGA|Add5~7\ $ (GND))) # (!\myVGA|BALL_WIDTH\(5) & ((GND) # (!\myVGA|Add5~7\)))
|
||
|
|
-- \myVGA|Add5~9\ = CARRY((!\myVGA|Add5~7\) # (!\myVGA|BALL_WIDTH\(5)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add5~7\,
|
||
|
|
combout => \myVGA|Add5~8_combout\,
|
||
|
|
cout => \myVGA|Add5~9\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N16
|
||
|
|
\myVGA|Add5~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add5~10_combout\ = !\myVGA|Add5~9\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111100001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
cin => \myVGA|Add5~9\,
|
||
|
|
combout => \myVGA|Add5~10_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N18
|
||
|
|
\myVGA|LessThan9~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan9~1_cout\ = CARRY((!\myVGA|ball_b\(0) & \myVGA|BALL_WIDTH\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001000100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_b\(0),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|LessThan9~1_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N20
|
||
|
|
\myVGA|LessThan9~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan9~3_cout\ = CARRY((\myVGA|Add5~0_combout\ & (\myVGA|ball_y\(1) & !\myVGA|LessThan9~1_cout\)) # (!\myVGA|Add5~0_combout\ & ((\myVGA|ball_y\(1)) # (!\myVGA|LessThan9~1_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add5~0_combout\,
|
||
|
|
datab => \myVGA|ball_y\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan9~1_cout\,
|
||
|
|
cout => \myVGA|LessThan9~3_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N22
|
||
|
|
\myVGA|LessThan9~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan9~5_cout\ = CARRY((\myVGA|Add5~2_combout\ & ((!\myVGA|LessThan9~3_cout\) # (!\myVGA|ball_y\(2)))) # (!\myVGA|Add5~2_combout\ & (!\myVGA|ball_y\(2) & !\myVGA|LessThan9~3_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add5~2_combout\,
|
||
|
|
datab => \myVGA|ball_y\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan9~3_cout\,
|
||
|
|
cout => \myVGA|LessThan9~5_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N24
|
||
|
|
\myVGA|LessThan9~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan9~7_cout\ = CARRY((\myVGA|Add5~4_combout\ & (\myVGA|ball_y\(3) & !\myVGA|LessThan9~5_cout\)) # (!\myVGA|Add5~4_combout\ & ((\myVGA|ball_y\(3)) # (!\myVGA|LessThan9~5_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add5~4_combout\,
|
||
|
|
datab => \myVGA|ball_y\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan9~5_cout\,
|
||
|
|
cout => \myVGA|LessThan9~7_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N26
|
||
|
|
\myVGA|LessThan9~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan9~9_cout\ = CARRY((\myVGA|Add5~6_combout\ & ((!\myVGA|LessThan9~7_cout\) # (!\myVGA|ball_y\(4)))) # (!\myVGA|Add5~6_combout\ & (!\myVGA|ball_y\(4) & !\myVGA|LessThan9~7_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add5~6_combout\,
|
||
|
|
datab => \myVGA|ball_y\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan9~7_cout\,
|
||
|
|
cout => \myVGA|LessThan9~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N28
|
||
|
|
\myVGA|LessThan9~11\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan9~11_cout\ = CARRY((\myVGA|Add5~8_combout\ & (\myVGA|ball_y\(5) & !\myVGA|LessThan9~9_cout\)) # (!\myVGA|Add5~8_combout\ & ((\myVGA|ball_y\(5)) # (!\myVGA|LessThan9~9_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add5~8_combout\,
|
||
|
|
datab => \myVGA|ball_y\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan9~9_cout\,
|
||
|
|
cout => \myVGA|LessThan9~11_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y68_N30
|
||
|
|
\myVGA|LessThan9~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan9~12_combout\ = (\myVGA|Add5~10_combout\ & (!\myVGA|LessThan9~11_cout\ & !\myVGA|ball_y\(6))) # (!\myVGA|Add5~10_combout\ & ((!\myVGA|ball_y\(6)) # (!\myVGA|LessThan9~11_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000001100111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|Add5~10_combout\,
|
||
|
|
datad => \myVGA|ball_y\(6),
|
||
|
|
cin => \myVGA|LessThan9~11_cout\,
|
||
|
|
combout => \myVGA|LessThan9~12_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N10
|
||
|
|
\myVGA|ball_speed_y~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_speed_y~0_combout\ = (\myVGA|ball_y\(8) & (((\myVGA|LessThan9~12_combout\)))) # (!\myVGA|ball_y\(8) & (!\myVGA|ball_y\(6) & (\myVGA|LessThan11~10_combout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111010000000100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(6),
|
||
|
|
datab => \myVGA|LessThan11~10_combout\,
|
||
|
|
datac => \myVGA|ball_y\(8),
|
||
|
|
datad => \myVGA|LessThan9~12_combout\,
|
||
|
|
combout => \myVGA|ball_speed_y~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N0
|
||
|
|
\myVGA|ball_bounce:ball_speed_y[1]~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_bounce:ball_speed_y[1]~0_combout\ = !\myVGA|ball_speed_y~1_combout\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000011111111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datad => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
combout => \myVGA|ball_bounce:ball_speed_y[1]~0_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N1
|
||
|
|
\myVGA|ball_bounce:ball_speed_y[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_bounce:ball_speed_y[1]~0_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_bounce:ball_speed_y[1]~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N28
|
||
|
|
\myVGA|ball_y[7]~22\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[7]~22_combout\ = (\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(7) & (!\myVGA|ball_y[6]~21\)) # (!\myVGA|ball_y\(7) & ((\myVGA|ball_y[6]~21\) # (GND))))) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(7) & (\myVGA|ball_y[6]~21\ &
|
||
|
|
-- VCC)) # (!\myVGA|ball_y\(7) & (!\myVGA|ball_y[6]~21\))))
|
||
|
|
-- \myVGA|ball_y[7]~23\ = CARRY((\myVGA|ball_speed_y~1_combout\ & ((!\myVGA|ball_y[6]~21\) # (!\myVGA|ball_y\(7)))) # (!\myVGA|ball_speed_y~1_combout\ & (!\myVGA|ball_y\(7) & !\myVGA|ball_y[6]~21\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
datab => \myVGA|ball_y\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_y[6]~21\,
|
||
|
|
combout => \myVGA|ball_y[7]~22_combout\,
|
||
|
|
cout => \myVGA|ball_y[7]~23\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N29
|
||
|
|
\myVGA|ball_y[7]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_y[7]~22_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_y\(7));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N12
|
||
|
|
\myVGA|ball_speed_y~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_speed_y~1_combout\ = (\myVGA|ball_speed_y~0_combout\ & (((!\myVGA|ball_y\(8) & !\myVGA|ball_y\(7))) # (!\myVGA|ball_bounce:ball_speed_y[1]~q\))) # (!\myVGA|ball_speed_y~0_combout\ & (\myVGA|ball_bounce:ball_speed_y[1]~q\ $
|
||
|
|
-- (((!\myVGA|ball_y\(7)) # (!\myVGA|ball_y\(8))))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110001100111011",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_speed_y~0_combout\,
|
||
|
|
datab => \myVGA|ball_bounce:ball_speed_y[1]~q\,
|
||
|
|
datac => \myVGA|ball_y\(8),
|
||
|
|
datad => \myVGA|ball_y\(7),
|
||
|
|
combout => \myVGA|ball_speed_y~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y68_N30
|
||
|
|
\myVGA|ball_y[8]~24\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_y[8]~24_combout\ = \myVGA|ball_y\(8) $ (\myVGA|ball_y[7]~23\ $ (\myVGA|ball_speed_y~1_combout\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010101011010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(8),
|
||
|
|
datad => \myVGA|ball_speed_y~1_combout\,
|
||
|
|
cin => \myVGA|ball_y[7]~23\,
|
||
|
|
combout => \myVGA|ball_y[8]~24_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X30_Y68_N31
|
||
|
|
\myVGA|ball_y[8]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_y[8]~24_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_y\(8));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N12
|
||
|
|
\myVGA|Add16~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~0_combout\ = (\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) $ (VCC))) # (!\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) & VCC))
|
||
|
|
-- \myVGA|Add16~1\ = CARRY((\myVGA|BALL_WIDTH\(0) & \myVGA|ball_b\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110011010001000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datab => \myVGA|ball_b\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add16~0_combout\,
|
||
|
|
cout => \myVGA|Add16~1\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N14
|
||
|
|
\myVGA|Add16~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~2_combout\ = (\myVGA|BALL_WIDTH\(1) & ((\myVGA|ball_y\(1) & (!\myVGA|Add16~1\)) # (!\myVGA|ball_y\(1) & ((\myVGA|Add16~1\) # (GND))))) # (!\myVGA|BALL_WIDTH\(1) & ((\myVGA|ball_y\(1) & (\myVGA|Add16~1\ & VCC)) # (!\myVGA|ball_y\(1) &
|
||
|
|
-- (!\myVGA|Add16~1\))))
|
||
|
|
-- \myVGA|Add16~3\ = CARRY((\myVGA|BALL_WIDTH\(1) & ((!\myVGA|Add16~1\) # (!\myVGA|ball_y\(1)))) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|ball_y\(1) & !\myVGA|Add16~1\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100100101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datab => \myVGA|ball_y\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add16~1\,
|
||
|
|
combout => \myVGA|Add16~2_combout\,
|
||
|
|
cout => \myVGA|Add16~3\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N16
|
||
|
|
\myVGA|Add16~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~4_combout\ = ((\myVGA|BALL_WIDTH\(2) $ (\myVGA|ball_y\(2) $ (!\myVGA|Add16~3\)))) # (GND)
|
||
|
|
-- \myVGA|Add16~5\ = CARRY((\myVGA|BALL_WIDTH\(2) & ((\myVGA|ball_y\(2)) # (!\myVGA|Add16~3\))) # (!\myVGA|BALL_WIDTH\(2) & (\myVGA|ball_y\(2) & !\myVGA|Add16~3\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100110001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datab => \myVGA|ball_y\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add16~3\,
|
||
|
|
combout => \myVGA|Add16~4_combout\,
|
||
|
|
cout => \myVGA|Add16~5\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N18
|
||
|
|
\myVGA|Add16~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~6_combout\ = (\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add16~5\)) # (!\myVGA|BALL_WIDTH\(3) & (\myVGA|Add16~5\ & VCC)))) # (!\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3) & ((\myVGA|Add16~5\) # (GND))) # (!\myVGA|BALL_WIDTH\(3) &
|
||
|
|
-- (!\myVGA|Add16~5\))))
|
||
|
|
-- \myVGA|Add16~7\ = CARRY((\myVGA|ball_y\(3) & (\myVGA|BALL_WIDTH\(3) & !\myVGA|Add16~5\)) # (!\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3)) # (!\myVGA|Add16~5\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100101001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(3),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add16~5\,
|
||
|
|
combout => \myVGA|Add16~6_combout\,
|
||
|
|
cout => \myVGA|Add16~7\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N20
|
||
|
|
\myVGA|Add16~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~8_combout\ = ((\myVGA|ball_y\(4) $ (\myVGA|BALL_WIDTH\(4) $ (!\myVGA|Add16~7\)))) # (GND)
|
||
|
|
-- \myVGA|Add16~9\ = CARRY((\myVGA|ball_y\(4) & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|Add16~7\))) # (!\myVGA|ball_y\(4) & (\myVGA|BALL_WIDTH\(4) & !\myVGA|Add16~7\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100110001110",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(4),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add16~7\,
|
||
|
|
combout => \myVGA|Add16~8_combout\,
|
||
|
|
cout => \myVGA|Add16~9\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N22
|
||
|
|
\myVGA|Add16~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~10_combout\ = (\myVGA|BALL_WIDTH\(5) & ((\myVGA|ball_y\(5) & (\myVGA|Add16~9\ & VCC)) # (!\myVGA|ball_y\(5) & (!\myVGA|Add16~9\)))) # (!\myVGA|BALL_WIDTH\(5) & ((\myVGA|ball_y\(5) & (!\myVGA|Add16~9\)) # (!\myVGA|ball_y\(5) &
|
||
|
|
-- ((\myVGA|Add16~9\) # (GND)))))
|
||
|
|
-- \myVGA|Add16~11\ = CARRY((\myVGA|BALL_WIDTH\(5) & (!\myVGA|ball_y\(5) & !\myVGA|Add16~9\)) # (!\myVGA|BALL_WIDTH\(5) & ((!\myVGA|Add16~9\) # (!\myVGA|ball_y\(5)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000010111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datab => \myVGA|ball_y\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add16~9\,
|
||
|
|
combout => \myVGA|Add16~10_combout\,
|
||
|
|
cout => \myVGA|Add16~11\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N24
|
||
|
|
\myVGA|Add16~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~12_combout\ = (\myVGA|ball_y\(6) & (\myVGA|Add16~11\ $ (GND))) # (!\myVGA|ball_y\(6) & (!\myVGA|Add16~11\ & VCC))
|
||
|
|
-- \myVGA|Add16~13\ = CARRY((\myVGA|ball_y\(6) & !\myVGA|Add16~11\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_y\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add16~11\,
|
||
|
|
combout => \myVGA|Add16~12_combout\,
|
||
|
|
cout => \myVGA|Add16~13\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N26
|
||
|
|
\myVGA|Add16~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~14_combout\ = (\myVGA|ball_y\(7) & (!\myVGA|Add16~13\)) # (!\myVGA|ball_y\(7) & ((\myVGA|Add16~13\) # (GND)))
|
||
|
|
-- \myVGA|Add16~15\ = CARRY((!\myVGA|Add16~13\) # (!\myVGA|ball_y\(7)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_y\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add16~13\,
|
||
|
|
combout => \myVGA|Add16~14_combout\,
|
||
|
|
cout => \myVGA|Add16~15\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N28
|
||
|
|
\myVGA|Add16~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~16_combout\ = (\myVGA|ball_y\(8) & (\myVGA|Add16~15\ $ (GND))) # (!\myVGA|ball_y\(8) & (!\myVGA|Add16~15\ & VCC))
|
||
|
|
-- \myVGA|Add16~17\ = CARRY((\myVGA|ball_y\(8) & !\myVGA|Add16~15\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_y\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add16~15\,
|
||
|
|
combout => \myVGA|Add16~16_combout\,
|
||
|
|
cout => \myVGA|Add16~17\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X29_Y67_N30
|
||
|
|
\myVGA|Add16~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add16~18_combout\ = \myVGA|Add16~17\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111000011110000",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
cin => \myVGA|Add16~17\,
|
||
|
|
combout => \myVGA|Add16~18_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N0
|
||
|
|
\myVGA|LessThan14~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~1_cout\ = CARRY((!\myVGA|v_px_count\(0) & \myVGA|Add16~0_combout\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001000100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(0),
|
||
|
|
datab => \myVGA|Add16~0_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|LessThan14~1_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N2
|
||
|
|
\myVGA|LessThan14~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~3_cout\ = CARRY((\myVGA|v_px_count\(1) & ((!\myVGA|LessThan14~1_cout\) # (!\myVGA|Add16~2_combout\))) # (!\myVGA|v_px_count\(1) & (!\myVGA|Add16~2_combout\ & !\myVGA|LessThan14~1_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(1),
|
||
|
|
datab => \myVGA|Add16~2_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan14~1_cout\,
|
||
|
|
cout => \myVGA|LessThan14~3_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N4
|
||
|
|
\myVGA|LessThan14~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~5_cout\ = CARRY((\myVGA|Add16~4_combout\ & ((!\myVGA|LessThan14~3_cout\) # (!\myVGA|v_px_count\(2)))) # (!\myVGA|Add16~4_combout\ & (!\myVGA|v_px_count\(2) & !\myVGA|LessThan14~3_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add16~4_combout\,
|
||
|
|
datab => \myVGA|v_px_count\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan14~3_cout\,
|
||
|
|
cout => \myVGA|LessThan14~5_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N6
|
||
|
|
\myVGA|LessThan14~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~7_cout\ = CARRY((\myVGA|v_px_count\(3) & ((!\myVGA|LessThan14~5_cout\) # (!\myVGA|Add16~6_combout\))) # (!\myVGA|v_px_count\(3) & (!\myVGA|Add16~6_combout\ & !\myVGA|LessThan14~5_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(3),
|
||
|
|
datab => \myVGA|Add16~6_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan14~5_cout\,
|
||
|
|
cout => \myVGA|LessThan14~7_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N8
|
||
|
|
\myVGA|LessThan14~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~9_cout\ = CARRY((\myVGA|Add16~8_combout\ & ((!\myVGA|LessThan14~7_cout\) # (!\myVGA|v_px_count\(4)))) # (!\myVGA|Add16~8_combout\ & (!\myVGA|v_px_count\(4) & !\myVGA|LessThan14~7_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add16~8_combout\,
|
||
|
|
datab => \myVGA|v_px_count\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan14~7_cout\,
|
||
|
|
cout => \myVGA|LessThan14~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N10
|
||
|
|
\myVGA|LessThan14~11\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~11_cout\ = CARRY((\myVGA|v_px_count\(5) & ((!\myVGA|LessThan14~9_cout\) # (!\myVGA|Add16~10_combout\))) # (!\myVGA|v_px_count\(5) & (!\myVGA|Add16~10_combout\ & !\myVGA|LessThan14~9_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(5),
|
||
|
|
datab => \myVGA|Add16~10_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan14~9_cout\,
|
||
|
|
cout => \myVGA|LessThan14~11_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N12
|
||
|
|
\myVGA|LessThan14~13\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~13_cout\ = CARRY((\myVGA|v_px_count\(6) & (\myVGA|Add16~12_combout\ & !\myVGA|LessThan14~11_cout\)) # (!\myVGA|v_px_count\(6) & ((\myVGA|Add16~12_combout\) # (!\myVGA|LessThan14~11_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(6),
|
||
|
|
datab => \myVGA|Add16~12_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan14~11_cout\,
|
||
|
|
cout => \myVGA|LessThan14~13_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N14
|
||
|
|
\myVGA|LessThan14~15\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~15_cout\ = CARRY((\myVGA|v_px_count\(7) & ((!\myVGA|LessThan14~13_cout\) # (!\myVGA|Add16~14_combout\))) # (!\myVGA|v_px_count\(7) & (!\myVGA|Add16~14_combout\ & !\myVGA|LessThan14~13_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(7),
|
||
|
|
datab => \myVGA|Add16~14_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan14~13_cout\,
|
||
|
|
cout => \myVGA|LessThan14~15_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N16
|
||
|
|
\myVGA|LessThan14~17\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~17_cout\ = CARRY((\myVGA|v_px_count\(8) & (\myVGA|Add16~16_combout\ & !\myVGA|LessThan14~15_cout\)) # (!\myVGA|v_px_count\(8) & ((\myVGA|Add16~16_combout\) # (!\myVGA|LessThan14~15_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(8),
|
||
|
|
datab => \myVGA|Add16~16_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan14~15_cout\,
|
||
|
|
cout => \myVGA|LessThan14~17_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y67_N18
|
||
|
|
\myVGA|LessThan14~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan14~18_combout\ = (\myVGA|Add16~18_combout\ & ((\myVGA|LessThan14~17_cout\) # (!\myVGA|v_px_count\(9)))) # (!\myVGA|Add16~18_combout\ & (\myVGA|LessThan14~17_cout\ & !\myVGA|v_px_count\(9)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010000011111010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add16~18_combout\,
|
||
|
|
datad => \myVGA|v_px_count\(9),
|
||
|
|
cin => \myVGA|LessThan14~17_cout\,
|
||
|
|
combout => \myVGA|LessThan14~18_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N30
|
||
|
|
\myVGA|Add14~20\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add14~20_combout\ = !\myVGA|Add14~19\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111100001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
cin => \myVGA|Add14~19\,
|
||
|
|
combout => \myVGA|Add14~20_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N4
|
||
|
|
\myVGA|Add15~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~0_combout\ = (\myVGA|ball_b\(0) & ((GND) # (!\myVGA|BALL_WIDTH\(0)))) # (!\myVGA|ball_b\(0) & (\myVGA|BALL_WIDTH\(0) $ (GND)))
|
||
|
|
-- \myVGA|Add15~1\ = CARRY((\myVGA|ball_b\(0)) # (!\myVGA|BALL_WIDTH\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110011010111011",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_b\(0),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add15~0_combout\,
|
||
|
|
cout => \myVGA|Add15~1\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N6
|
||
|
|
\myVGA|Add15~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~2_combout\ = (\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1) & (\myVGA|Add15~1\ & VCC)) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add15~1\)))) # (!\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add15~1\)) # (!\myVGA|BALL_WIDTH\(1) &
|
||
|
|
-- ((\myVGA|Add15~1\) # (GND)))))
|
||
|
|
-- \myVGA|Add15~3\ = CARRY((\myVGA|ball_x\(1) & (!\myVGA|BALL_WIDTH\(1) & !\myVGA|Add15~1\)) # (!\myVGA|ball_x\(1) & ((!\myVGA|Add15~1\) # (!\myVGA|BALL_WIDTH\(1)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000010111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(1),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~1\,
|
||
|
|
combout => \myVGA|Add15~2_combout\,
|
||
|
|
cout => \myVGA|Add15~3\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N8
|
||
|
|
\myVGA|Add15~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~4_combout\ = ((\myVGA|ball_x\(2) $ (\myVGA|BALL_WIDTH\(2) $ (\myVGA|Add15~3\)))) # (GND)
|
||
|
|
-- \myVGA|Add15~5\ = CARRY((\myVGA|ball_x\(2) & ((!\myVGA|Add15~3\) # (!\myVGA|BALL_WIDTH\(2)))) # (!\myVGA|ball_x\(2) & (!\myVGA|BALL_WIDTH\(2) & !\myVGA|Add15~3\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(2),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~3\,
|
||
|
|
combout => \myVGA|Add15~4_combout\,
|
||
|
|
cout => \myVGA|Add15~5\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N10
|
||
|
|
\myVGA|Add15~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~6_combout\ = (\myVGA|ball_x\(3) & ((\myVGA|BALL_WIDTH\(3) & (\myVGA|Add15~5\ & VCC)) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add15~5\)))) # (!\myVGA|ball_x\(3) & ((\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add15~5\)) # (!\myVGA|BALL_WIDTH\(3) &
|
||
|
|
-- ((\myVGA|Add15~5\) # (GND)))))
|
||
|
|
-- \myVGA|Add15~7\ = CARRY((\myVGA|ball_x\(3) & (!\myVGA|BALL_WIDTH\(3) & !\myVGA|Add15~5\)) # (!\myVGA|ball_x\(3) & ((!\myVGA|Add15~5\) # (!\myVGA|BALL_WIDTH\(3)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000010111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(3),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~5\,
|
||
|
|
combout => \myVGA|Add15~6_combout\,
|
||
|
|
cout => \myVGA|Add15~7\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N12
|
||
|
|
\myVGA|Add15~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~8_combout\ = ((\myVGA|ball_x\(4) $ (\myVGA|BALL_WIDTH\(4) $ (\myVGA|Add15~7\)))) # (GND)
|
||
|
|
-- \myVGA|Add15~9\ = CARRY((\myVGA|ball_x\(4) & ((!\myVGA|Add15~7\) # (!\myVGA|BALL_WIDTH\(4)))) # (!\myVGA|ball_x\(4) & (!\myVGA|BALL_WIDTH\(4) & !\myVGA|Add15~7\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(4),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~7\,
|
||
|
|
combout => \myVGA|Add15~8_combout\,
|
||
|
|
cout => \myVGA|Add15~9\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N14
|
||
|
|
\myVGA|Add15~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~10_combout\ = (\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add15~9\)) # (!\myVGA|BALL_WIDTH\(5) & (\myVGA|Add15~9\ & VCC)))) # (!\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5) & ((\myVGA|Add15~9\) # (GND))) # (!\myVGA|BALL_WIDTH\(5) &
|
||
|
|
-- (!\myVGA|Add15~9\))))
|
||
|
|
-- \myVGA|Add15~11\ = CARRY((\myVGA|ball_x\(5) & (\myVGA|BALL_WIDTH\(5) & !\myVGA|Add15~9\)) # (!\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5)) # (!\myVGA|Add15~9\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100101001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(5),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~9\,
|
||
|
|
combout => \myVGA|Add15~10_combout\,
|
||
|
|
cout => \myVGA|Add15~11\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N16
|
||
|
|
\myVGA|Add15~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~12_combout\ = (\myVGA|ball_x\(6) & ((GND) # (!\myVGA|Add15~11\))) # (!\myVGA|ball_x\(6) & (\myVGA|Add15~11\ $ (GND)))
|
||
|
|
-- \myVGA|Add15~13\ = CARRY((\myVGA|ball_x\(6)) # (!\myVGA|Add15~11\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110011001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_x\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~11\,
|
||
|
|
combout => \myVGA|Add15~12_combout\,
|
||
|
|
cout => \myVGA|Add15~13\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N18
|
||
|
|
\myVGA|Add15~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~14_combout\ = (\myVGA|ball_x\(7) & (\myVGA|Add15~13\ & VCC)) # (!\myVGA|ball_x\(7) & (!\myVGA|Add15~13\))
|
||
|
|
-- \myVGA|Add15~15\ = CARRY((!\myVGA|ball_x\(7) & !\myVGA|Add15~13\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100000011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_x\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~13\,
|
||
|
|
combout => \myVGA|Add15~14_combout\,
|
||
|
|
cout => \myVGA|Add15~15\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N20
|
||
|
|
\myVGA|Add15~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~16_combout\ = (\myVGA|ball_x\(8) & ((GND) # (!\myVGA|Add15~15\))) # (!\myVGA|ball_x\(8) & (\myVGA|Add15~15\ $ (GND)))
|
||
|
|
-- \myVGA|Add15~17\ = CARRY((\myVGA|ball_x\(8)) # (!\myVGA|Add15~15\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110011001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_x\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~15\,
|
||
|
|
combout => \myVGA|Add15~16_combout\,
|
||
|
|
cout => \myVGA|Add15~17\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N22
|
||
|
|
\myVGA|Add15~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~18_combout\ = (\myVGA|ball_x\(9) & (\myVGA|Add15~17\ & VCC)) # (!\myVGA|ball_x\(9) & (!\myVGA|Add15~17\))
|
||
|
|
-- \myVGA|Add15~19\ = CARRY((!\myVGA|ball_x\(9) & !\myVGA|Add15~17\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100000101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_x\(9),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add15~17\,
|
||
|
|
combout => \myVGA|Add15~18_combout\,
|
||
|
|
cout => \myVGA|Add15~19\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N6
|
||
|
|
\myVGA|LessThan13~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~1_cout\ = CARRY((\myVGA|Add15~0_combout\ & !\myVGA|h_px_count\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000100010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add15~0_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(0),
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|LessThan13~1_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N8
|
||
|
|
\myVGA|LessThan13~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~3_cout\ = CARRY((\myVGA|h_px_count\(1) & ((!\myVGA|LessThan13~1_cout\) # (!\myVGA|Add15~2_combout\))) # (!\myVGA|h_px_count\(1) & (!\myVGA|Add15~2_combout\ & !\myVGA|LessThan13~1_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(1),
|
||
|
|
datab => \myVGA|Add15~2_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan13~1_cout\,
|
||
|
|
cout => \myVGA|LessThan13~3_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N10
|
||
|
|
\myVGA|LessThan13~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~5_cout\ = CARRY((\myVGA|Add15~4_combout\ & ((!\myVGA|LessThan13~3_cout\) # (!\myVGA|h_px_count\(2)))) # (!\myVGA|Add15~4_combout\ & (!\myVGA|h_px_count\(2) & !\myVGA|LessThan13~3_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add15~4_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan13~3_cout\,
|
||
|
|
cout => \myVGA|LessThan13~5_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N12
|
||
|
|
\myVGA|LessThan13~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~7_cout\ = CARRY((\myVGA|Add15~6_combout\ & (\myVGA|h_px_count\(3) & !\myVGA|LessThan13~5_cout\)) # (!\myVGA|Add15~6_combout\ & ((\myVGA|h_px_count\(3)) # (!\myVGA|LessThan13~5_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add15~6_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan13~5_cout\,
|
||
|
|
cout => \myVGA|LessThan13~7_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N14
|
||
|
|
\myVGA|LessThan13~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~9_cout\ = CARRY((\myVGA|h_px_count\(4) & (\myVGA|Add15~8_combout\ & !\myVGA|LessThan13~7_cout\)) # (!\myVGA|h_px_count\(4) & ((\myVGA|Add15~8_combout\) # (!\myVGA|LessThan13~7_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(4),
|
||
|
|
datab => \myVGA|Add15~8_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan13~7_cout\,
|
||
|
|
cout => \myVGA|LessThan13~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N16
|
||
|
|
\myVGA|LessThan13~11\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~11_cout\ = CARRY((\myVGA|Add15~10_combout\ & (\myVGA|h_px_count\(5) & !\myVGA|LessThan13~9_cout\)) # (!\myVGA|Add15~10_combout\ & ((\myVGA|h_px_count\(5)) # (!\myVGA|LessThan13~9_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add15~10_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan13~9_cout\,
|
||
|
|
cout => \myVGA|LessThan13~11_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N18
|
||
|
|
\myVGA|LessThan13~13\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~13_cout\ = CARRY((\myVGA|Add15~12_combout\ & ((!\myVGA|LessThan13~11_cout\) # (!\myVGA|h_px_count\(6)))) # (!\myVGA|Add15~12_combout\ & (!\myVGA|h_px_count\(6) & !\myVGA|LessThan13~11_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add15~12_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan13~11_cout\,
|
||
|
|
cout => \myVGA|LessThan13~13_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N20
|
||
|
|
\myVGA|LessThan13~15\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~15_cout\ = CARRY((\myVGA|Add15~14_combout\ & (\myVGA|h_px_count\(7) & !\myVGA|LessThan13~13_cout\)) # (!\myVGA|Add15~14_combout\ & ((\myVGA|h_px_count\(7)) # (!\myVGA|LessThan13~13_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add15~14_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan13~13_cout\,
|
||
|
|
cout => \myVGA|LessThan13~15_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N22
|
||
|
|
\myVGA|LessThan13~17\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~17_cout\ = CARRY((\myVGA|Add15~16_combout\ & ((!\myVGA|LessThan13~15_cout\) # (!\myVGA|h_px_count\(8)))) # (!\myVGA|Add15~16_combout\ & (!\myVGA|h_px_count\(8) & !\myVGA|LessThan13~15_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add15~16_combout\,
|
||
|
|
datab => \myVGA|h_px_count\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan13~15_cout\,
|
||
|
|
cout => \myVGA|LessThan13~17_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y68_N24
|
||
|
|
\myVGA|LessThan13~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan13~18_combout\ = (\myVGA|Add15~18_combout\ & ((\myVGA|LessThan13~17_cout\) # (!\myVGA|h_px_count\(9)))) # (!\myVGA|Add15~18_combout\ & (\myVGA|LessThan13~17_cout\ & !\myVGA|h_px_count\(9)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100000011111100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|Add15~18_combout\,
|
||
|
|
datad => \myVGA|h_px_count\(9),
|
||
|
|
cin => \myVGA|LessThan13~17_cout\,
|
||
|
|
combout => \myVGA|LessThan13~18_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N0
|
||
|
|
\myVGA|Add17~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~0_combout\ = (\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) $ (VCC))) # (!\myVGA|BALL_WIDTH\(0) & ((\myVGA|ball_b\(0)) # (GND)))
|
||
|
|
-- \myVGA|Add17~1\ = CARRY((\myVGA|ball_b\(0)) # (!\myVGA|BALL_WIDTH\(0)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110011011011101",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|BALL_WIDTH\(0),
|
||
|
|
datab => \myVGA|ball_b\(0),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|Add17~0_combout\,
|
||
|
|
cout => \myVGA|Add17~1\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N2
|
||
|
|
\myVGA|Add17~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~2_combout\ = (\myVGA|ball_y\(1) & ((\myVGA|BALL_WIDTH\(1) & (\myVGA|Add17~1\ & VCC)) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add17~1\)))) # (!\myVGA|ball_y\(1) & ((\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add17~1\)) # (!\myVGA|BALL_WIDTH\(1) &
|
||
|
|
-- ((\myVGA|Add17~1\) # (GND)))))
|
||
|
|
-- \myVGA|Add17~3\ = CARRY((\myVGA|ball_y\(1) & (!\myVGA|BALL_WIDTH\(1) & !\myVGA|Add17~1\)) # (!\myVGA|ball_y\(1) & ((!\myVGA|Add17~1\) # (!\myVGA|BALL_WIDTH\(1)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000010111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(1),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add17~1\,
|
||
|
|
combout => \myVGA|Add17~2_combout\,
|
||
|
|
cout => \myVGA|Add17~3\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N4
|
||
|
|
\myVGA|Add17~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~4_combout\ = ((\myVGA|ball_y\(2) $ (\myVGA|BALL_WIDTH\(2) $ (\myVGA|Add17~3\)))) # (GND)
|
||
|
|
-- \myVGA|Add17~5\ = CARRY((\myVGA|ball_y\(2) & ((!\myVGA|Add17~3\) # (!\myVGA|BALL_WIDTH\(2)))) # (!\myVGA|ball_y\(2) & (!\myVGA|BALL_WIDTH\(2) & !\myVGA|Add17~3\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(2),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add17~3\,
|
||
|
|
combout => \myVGA|Add17~4_combout\,
|
||
|
|
cout => \myVGA|Add17~5\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N6
|
||
|
|
\myVGA|Add17~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~6_combout\ = (\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3) & (\myVGA|Add17~5\ & VCC)) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add17~5\)))) # (!\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add17~5\)) # (!\myVGA|BALL_WIDTH\(3) &
|
||
|
|
-- ((\myVGA|Add17~5\) # (GND)))))
|
||
|
|
-- \myVGA|Add17~7\ = CARRY((\myVGA|ball_y\(3) & (!\myVGA|BALL_WIDTH\(3) & !\myVGA|Add17~5\)) # (!\myVGA|ball_y\(3) & ((!\myVGA|Add17~5\) # (!\myVGA|BALL_WIDTH\(3)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000010111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(3),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add17~5\,
|
||
|
|
combout => \myVGA|Add17~6_combout\,
|
||
|
|
cout => \myVGA|Add17~7\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N8
|
||
|
|
\myVGA|Add17~8\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~8_combout\ = ((\myVGA|ball_y\(4) $ (\myVGA|BALL_WIDTH\(4) $ (\myVGA|Add17~7\)))) # (GND)
|
||
|
|
-- \myVGA|Add17~9\ = CARRY((\myVGA|ball_y\(4) & ((!\myVGA|Add17~7\) # (!\myVGA|BALL_WIDTH\(4)))) # (!\myVGA|ball_y\(4) & (!\myVGA|BALL_WIDTH\(4) & !\myVGA|Add17~7\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1001011000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(4),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add17~7\,
|
||
|
|
combout => \myVGA|Add17~8_combout\,
|
||
|
|
cout => \myVGA|Add17~9\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N10
|
||
|
|
\myVGA|Add17~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~10_combout\ = (\myVGA|ball_y\(5) & ((\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add17~9\)) # (!\myVGA|BALL_WIDTH\(5) & (\myVGA|Add17~9\ & VCC)))) # (!\myVGA|ball_y\(5) & ((\myVGA|BALL_WIDTH\(5) & ((\myVGA|Add17~9\) # (GND))) # (!\myVGA|BALL_WIDTH\(5) &
|
||
|
|
-- (!\myVGA|Add17~9\))))
|
||
|
|
-- \myVGA|Add17~11\ = CARRY((\myVGA|ball_y\(5) & (\myVGA|BALL_WIDTH\(5) & !\myVGA|Add17~9\)) # (!\myVGA|ball_y\(5) & ((\myVGA|BALL_WIDTH\(5)) # (!\myVGA|Add17~9\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110100101001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(5),
|
||
|
|
datab => \myVGA|BALL_WIDTH\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add17~9\,
|
||
|
|
combout => \myVGA|Add17~10_combout\,
|
||
|
|
cout => \myVGA|Add17~11\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N12
|
||
|
|
\myVGA|Add17~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~12_combout\ = (\myVGA|ball_y\(6) & ((GND) # (!\myVGA|Add17~11\))) # (!\myVGA|ball_y\(6) & (\myVGA|Add17~11\ $ (GND)))
|
||
|
|
-- \myVGA|Add17~13\ = CARRY((\myVGA|ball_y\(6)) # (!\myVGA|Add17~11\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110011001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_y\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add17~11\,
|
||
|
|
combout => \myVGA|Add17~12_combout\,
|
||
|
|
cout => \myVGA|Add17~13\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N14
|
||
|
|
\myVGA|Add17~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~14_combout\ = (\myVGA|ball_y\(7) & (\myVGA|Add17~13\ & VCC)) # (!\myVGA|ball_y\(7) & (!\myVGA|Add17~13\))
|
||
|
|
-- \myVGA|Add17~15\ = CARRY((!\myVGA|ball_y\(7) & !\myVGA|Add17~13\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100000101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(7),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add17~13\,
|
||
|
|
combout => \myVGA|Add17~14_combout\,
|
||
|
|
cout => \myVGA|Add17~15\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N16
|
||
|
|
\myVGA|Add17~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~16_combout\ = (\myVGA|ball_y\(8) & ((GND) # (!\myVGA|Add17~15\))) # (!\myVGA|ball_y\(8) & (\myVGA|Add17~15\ $ (GND)))
|
||
|
|
-- \myVGA|Add17~17\ = CARRY((\myVGA|ball_y\(8)) # (!\myVGA|Add17~15\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101010101111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_y\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|Add17~15\,
|
||
|
|
combout => \myVGA|Add17~16_combout\,
|
||
|
|
cout => \myVGA|Add17~17\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X30_Y67_N18
|
||
|
|
\myVGA|Add17~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add17~18_combout\ = !\myVGA|Add17~17\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000111100001111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
cin => \myVGA|Add17~17\,
|
||
|
|
combout => \myVGA|Add17~18_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N10
|
||
|
|
\myVGA|LessThan15~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~1_cout\ = CARRY((!\myVGA|v_px_count\(0) & \myVGA|Add17~0_combout\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001000100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(0),
|
||
|
|
datab => \myVGA|Add17~0_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|LessThan15~1_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N12
|
||
|
|
\myVGA|LessThan15~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~3_cout\ = CARRY((\myVGA|v_px_count\(1) & ((!\myVGA|LessThan15~1_cout\) # (!\myVGA|Add17~2_combout\))) # (!\myVGA|v_px_count\(1) & (!\myVGA|Add17~2_combout\ & !\myVGA|LessThan15~1_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(1),
|
||
|
|
datab => \myVGA|Add17~2_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan15~1_cout\,
|
||
|
|
cout => \myVGA|LessThan15~3_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N14
|
||
|
|
\myVGA|LessThan15~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~5_cout\ = CARRY((\myVGA|Add17~4_combout\ & ((!\myVGA|LessThan15~3_cout\) # (!\myVGA|v_px_count\(2)))) # (!\myVGA|Add17~4_combout\ & (!\myVGA|v_px_count\(2) & !\myVGA|LessThan15~3_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add17~4_combout\,
|
||
|
|
datab => \myVGA|v_px_count\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan15~3_cout\,
|
||
|
|
cout => \myVGA|LessThan15~5_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N16
|
||
|
|
\myVGA|LessThan15~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~7_cout\ = CARRY((\myVGA|v_px_count\(3) & ((!\myVGA|LessThan15~5_cout\) # (!\myVGA|Add17~6_combout\))) # (!\myVGA|v_px_count\(3) & (!\myVGA|Add17~6_combout\ & !\myVGA|LessThan15~5_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(3),
|
||
|
|
datab => \myVGA|Add17~6_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan15~5_cout\,
|
||
|
|
cout => \myVGA|LessThan15~7_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N18
|
||
|
|
\myVGA|LessThan15~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~9_cout\ = CARRY((\myVGA|Add17~8_combout\ & ((!\myVGA|LessThan15~7_cout\) # (!\myVGA|v_px_count\(4)))) # (!\myVGA|Add17~8_combout\ & (!\myVGA|v_px_count\(4) & !\myVGA|LessThan15~7_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add17~8_combout\,
|
||
|
|
datab => \myVGA|v_px_count\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan15~7_cout\,
|
||
|
|
cout => \myVGA|LessThan15~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N20
|
||
|
|
\myVGA|LessThan15~11\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~11_cout\ = CARRY((\myVGA|v_px_count\(5) & ((!\myVGA|LessThan15~9_cout\) # (!\myVGA|Add17~10_combout\))) # (!\myVGA|v_px_count\(5) & (!\myVGA|Add17~10_combout\ & !\myVGA|LessThan15~9_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(5),
|
||
|
|
datab => \myVGA|Add17~10_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan15~9_cout\,
|
||
|
|
cout => \myVGA|LessThan15~11_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N22
|
||
|
|
\myVGA|LessThan15~13\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~13_cout\ = CARRY((\myVGA|v_px_count\(6) & (\myVGA|Add17~12_combout\ & !\myVGA|LessThan15~11_cout\)) # (!\myVGA|v_px_count\(6) & ((\myVGA|Add17~12_combout\) # (!\myVGA|LessThan15~11_cout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000001001101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(6),
|
||
|
|
datab => \myVGA|Add17~12_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan15~11_cout\,
|
||
|
|
cout => \myVGA|LessThan15~13_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N24
|
||
|
|
\myVGA|LessThan15~15\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~15_cout\ = CARRY((\myVGA|v_px_count\(7) & ((!\myVGA|LessThan15~13_cout\) # (!\myVGA|Add17~14_combout\))) # (!\myVGA|v_px_count\(7) & (!\myVGA|Add17~14_combout\ & !\myVGA|LessThan15~13_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(7),
|
||
|
|
datab => \myVGA|Add17~14_combout\,
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan15~13_cout\,
|
||
|
|
cout => \myVGA|LessThan15~15_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N26
|
||
|
|
\myVGA|LessThan15~17\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~17_cout\ = CARRY((\myVGA|Add17~16_combout\ & ((!\myVGA|LessThan15~15_cout\) # (!\myVGA|v_px_count\(8)))) # (!\myVGA|Add17~16_combout\ & (!\myVGA|v_px_count\(8) & !\myVGA|LessThan15~15_cout\)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000000101011",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add17~16_combout\,
|
||
|
|
datab => \myVGA|v_px_count\(8),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|LessThan15~15_cout\,
|
||
|
|
cout => \myVGA|LessThan15~17_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X31_Y67_N28
|
||
|
|
\myVGA|LessThan15~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|LessThan15~18_combout\ = (\myVGA|Add17~18_combout\ & ((\myVGA|LessThan15~17_cout\) # (!\myVGA|v_px_count\(9)))) # (!\myVGA|Add17~18_combout\ & (!\myVGA|v_px_count\(9) & \myVGA|LessThan15~17_cout\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1011001010110010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|Add17~18_combout\,
|
||
|
|
datab => \myVGA|v_px_count\(9),
|
||
|
|
cin => \myVGA|LessThan15~17_cout\,
|
||
|
|
combout => \myVGA|LessThan15~18_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y68_N24
|
||
|
|
\myVGA|Add15~20\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|Add15~20_combout\ = \myVGA|Add15~19\
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111000011110000",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
cin => \myVGA|Add15~19\,
|
||
|
|
combout => \myVGA|Add15~20_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N2
|
||
|
|
\myVGA|ball_draw~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_draw~0_combout\ = (\myVGA|LessThan13~18_combout\ & (\myVGA|Add15~20_combout\ & ((\myVGA|Add17~18_combout\) # (!\myVGA|LessThan15~18_combout\)))) # (!\myVGA|LessThan13~18_combout\ & ((\myVGA|Add17~18_combout\) #
|
||
|
|
-- ((!\myVGA|LessThan15~18_combout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100111101000101",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|LessThan13~18_combout\,
|
||
|
|
datab => \myVGA|Add17~18_combout\,
|
||
|
|
datac => \myVGA|LessThan15~18_combout\,
|
||
|
|
datad => \myVGA|Add15~20_combout\,
|
||
|
|
combout => \myVGA|ball_draw~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X32_Y67_N0
|
||
|
|
\myVGA|ball_draw~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_draw~1_combout\ = (\myVGA|LessThan14~18_combout\ & (\myVGA|ball_draw~0_combout\ & ((\myVGA|LessThan12~18_combout\) # (\myVGA|Add14~20_combout\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100100000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|LessThan12~18_combout\,
|
||
|
|
datab => \myVGA|LessThan14~18_combout\,
|
||
|
|
datac => \myVGA|Add14~20_combout\,
|
||
|
|
datad => \myVGA|ball_draw~0_combout\,
|
||
|
|
combout => \myVGA|ball_draw~1_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X32_Y67_N1
|
||
|
|
\myVGA|color_mask[0]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_draw~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|color_mask\(0));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N30
|
||
|
|
\myVGA|can_draw~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|can_draw~0_combout\ = (\myVGA|v_px_count\(9)) # ((\myVGA|h_px_count\(9) & ((\myVGA|h_px_count\(8)) # (\myVGA|h_px_count\(7)))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111101011111000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(9),
|
||
|
|
datab => \myVGA|h_px_count\(8),
|
||
|
|
datac => \myVGA|v_px_count\(9),
|
||
|
|
datad => \myVGA|h_px_count\(7),
|
||
|
|
combout => \myVGA|can_draw~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N8
|
||
|
|
\myVGA|V_SYNC_GEN~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|V_SYNC_GEN~0_combout\ = (\myVGA|v_px_count\(6) & (\myVGA|v_px_count\(7) & (\myVGA|v_px_count\(8) & \myVGA|v_px_count\(5))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(6),
|
||
|
|
datab => \myVGA|v_px_count\(7),
|
||
|
|
datac => \myVGA|v_px_count\(8),
|
||
|
|
datad => \myVGA|v_px_count\(5),
|
||
|
|
combout => \myVGA|V_SYNC_GEN~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X33_Y67_N28
|
||
|
|
\myVGA|can_draw~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|can_draw~1_combout\ = (\rst~input_o\ & (!\myVGA|can_draw~0_combout\ & ((!\myVGA|V_SYNC_GEN~0_combout\)))) # (!\rst~input_o\ & (((\myVGA|can_draw~q\))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101000001110010",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \rst~input_o\,
|
||
|
|
datab => \myVGA|can_draw~0_combout\,
|
||
|
|
datac => \myVGA|can_draw~q\,
|
||
|
|
datad => \myVGA|V_SYNC_GEN~0_combout\,
|
||
|
|
combout => \myVGA|can_draw~1_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X33_Y67_N29
|
||
|
|
\myVGA|can_draw\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|can_draw~1_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|can_draw~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N0
|
||
|
|
\myVGA|R[1]~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|R[1]~0_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(0) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000100000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|color_mask\(0),
|
||
|
|
datab => \myVGA|ball_b\(0),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|R[1]~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N14
|
||
|
|
\myVGA|ball_g[1]~7\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_g[1]~7_combout\ = (\myVGA|ball_b\(0) & (\myVGA|ball_g\(1) $ (VCC))) # (!\myVGA|ball_b\(0) & (\myVGA|ball_g\(1) & VCC))
|
||
|
|
-- \myVGA|ball_g[1]~8\ = CARRY((\myVGA|ball_b\(0) & \myVGA|ball_g\(1)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0110011010001000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_b\(0),
|
||
|
|
datab => \myVGA|ball_g\(1),
|
||
|
|
datad => VCC,
|
||
|
|
combout => \myVGA|ball_g[1]~7_combout\,
|
||
|
|
cout => \myVGA|ball_g[1]~8\);
|
||
|
|
|
||
|
|
-- Location: FF_X28_Y68_N15
|
||
|
|
\myVGA|ball_g[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_g[1]~7_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_g\(1));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N10
|
||
|
|
\myVGA|R[2]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|R[2]~1_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_g\(1) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|color_mask\(0),
|
||
|
|
datac => \myVGA|ball_g\(1),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|R[2]~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N16
|
||
|
|
\myVGA|ball_g[2]~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_g[2]~9_combout\ = (\myVGA|ball_g\(2) & (!\myVGA|ball_g[1]~8\)) # (!\myVGA|ball_g\(2) & ((\myVGA|ball_g[1]~8\) # (GND)))
|
||
|
|
-- \myVGA|ball_g[2]~10\ = CARRY((!\myVGA|ball_g[1]~8\) # (!\myVGA|ball_g\(2)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_g\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_g[1]~8\,
|
||
|
|
combout => \myVGA|ball_g[2]~9_combout\,
|
||
|
|
cout => \myVGA|ball_g[2]~10\);
|
||
|
|
|
||
|
|
-- Location: FF_X28_Y68_N17
|
||
|
|
\myVGA|ball_g[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_g[2]~9_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_g\(2));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N4
|
||
|
|
\myVGA|R[3]~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|R[3]~2_combout\ = (\myVGA|ball_g\(2) & (\myVGA|color_mask\(0) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_g\(2),
|
||
|
|
datac => \myVGA|color_mask\(0),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|R[3]~2_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N18
|
||
|
|
\myVGA|ball_g[3]~11\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_g[3]~11_combout\ = (\myVGA|ball_g\(3) & (\myVGA|ball_g[2]~10\ $ (GND))) # (!\myVGA|ball_g\(3) & (!\myVGA|ball_g[2]~10\ & VCC))
|
||
|
|
-- \myVGA|ball_g[3]~12\ = CARRY((\myVGA|ball_g\(3) & !\myVGA|ball_g[2]~10\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_g\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_g[2]~10\,
|
||
|
|
combout => \myVGA|ball_g[3]~11_combout\,
|
||
|
|
cout => \myVGA|ball_g[3]~12\);
|
||
|
|
|
||
|
|
-- Location: FF_X28_Y68_N19
|
||
|
|
\myVGA|ball_g[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_g[3]~11_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_g\(3));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N30
|
||
|
|
\myVGA|R[4]~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|R[4]~3_combout\ = (\myVGA|ball_g\(3) & (\myVGA|color_mask\(0) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_g\(3),
|
||
|
|
datac => \myVGA|color_mask\(0),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|R[4]~3_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N20
|
||
|
|
\myVGA|ball_g[4]~13\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_g[4]~13_combout\ = (\myVGA|ball_g\(4) & (!\myVGA|ball_g[3]~12\)) # (!\myVGA|ball_g\(4) & ((\myVGA|ball_g[3]~12\) # (GND)))
|
||
|
|
-- \myVGA|ball_g[4]~14\ = CARRY((!\myVGA|ball_g[3]~12\) # (!\myVGA|ball_g\(4)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_g\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_g[3]~12\,
|
||
|
|
combout => \myVGA|ball_g[4]~13_combout\,
|
||
|
|
cout => \myVGA|ball_g[4]~14\);
|
||
|
|
|
||
|
|
-- Location: FF_X28_Y68_N21
|
||
|
|
\myVGA|ball_g[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_g[4]~13_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_g\(4));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N0
|
||
|
|
\myVGA|R[5]~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|R[5]~4_combout\ = (\myVGA|ball_g\(4) & (\myVGA|color_mask\(0) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_g\(4),
|
||
|
|
datac => \myVGA|color_mask\(0),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|R[5]~4_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N22
|
||
|
|
\myVGA|ball_g[5]~15\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_g[5]~15_combout\ = (\myVGA|ball_g\(5) & (\myVGA|ball_g[4]~14\ $ (GND))) # (!\myVGA|ball_g\(5) & (!\myVGA|ball_g[4]~14\ & VCC))
|
||
|
|
-- \myVGA|ball_g[5]~16\ = CARRY((\myVGA|ball_g\(5) & !\myVGA|ball_g[4]~14\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_g\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_g[4]~14\,
|
||
|
|
combout => \myVGA|ball_g[5]~15_combout\,
|
||
|
|
cout => \myVGA|ball_g[5]~16\);
|
||
|
|
|
||
|
|
-- Location: FF_X28_Y68_N23
|
||
|
|
\myVGA|ball_g[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_g[5]~15_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_g\(5));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N2
|
||
|
|
\myVGA|R[6]~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|R[6]~5_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_g\(5) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|color_mask\(0),
|
||
|
|
datac => \myVGA|ball_g\(5),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|R[6]~5_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N24
|
||
|
|
\myVGA|ball_g[6]~17\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_g[6]~17_combout\ = (\myVGA|ball_g\(6) & (!\myVGA|ball_g[5]~16\)) # (!\myVGA|ball_g\(6) & ((\myVGA|ball_g[5]~16\) # (GND)))
|
||
|
|
-- \myVGA|ball_g[6]~18\ = CARRY((!\myVGA|ball_g[5]~16\) # (!\myVGA|ball_g\(6)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_g\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_g[5]~16\,
|
||
|
|
combout => \myVGA|ball_g[6]~17_combout\,
|
||
|
|
cout => \myVGA|ball_g[6]~18\);
|
||
|
|
|
||
|
|
-- Location: FF_X28_Y68_N25
|
||
|
|
\myVGA|ball_g[6]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_g[6]~17_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_g\(6));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N12
|
||
|
|
\myVGA|R[7]~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|R[7]~6_combout\ = (\myVGA|ball_g\(6) & (\myVGA|color_mask\(0) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_g\(6),
|
||
|
|
datac => \myVGA|color_mask\(0),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|R[7]~6_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N26
|
||
|
|
\myVGA|ball_g[7]~19\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_g[7]~19_combout\ = \myVGA|ball_g\(7) $ (!\myVGA|ball_g[6]~18\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010110100101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_g\(7),
|
||
|
|
cin => \myVGA|ball_g[6]~18\,
|
||
|
|
combout => \myVGA|ball_g[7]~19_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X28_Y68_N27
|
||
|
|
\myVGA|ball_g[7]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_g[7]~19_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_g\(7));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X28_Y68_N28
|
||
|
|
\myVGA|G[7]~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|G[7]~0_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_g\(7) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|color_mask\(0),
|
||
|
|
datac => \myVGA|ball_g\(7),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|G[7]~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N8
|
||
|
|
\myVGA|ball_b[1]~9\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[1]~9_cout\ = CARRY(\myVGA|ball_b\(0))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000011001100",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_b\(0),
|
||
|
|
datad => VCC,
|
||
|
|
cout => \myVGA|ball_b[1]~9_cout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N10
|
||
|
|
\myVGA|ball_b[1]~10\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[1]~10_combout\ = (\myVGA|ball_b\(1) & (\myVGA|ball_b[1]~9_cout\ & VCC)) # (!\myVGA|ball_b\(1) & (!\myVGA|ball_b[1]~9_cout\))
|
||
|
|
-- \myVGA|ball_b[1]~11\ = CARRY((!\myVGA|ball_b\(1) & !\myVGA|ball_b[1]~9_cout\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100000101",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_b\(1),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_b[1]~9_cout\,
|
||
|
|
combout => \myVGA|ball_b[1]~10_combout\,
|
||
|
|
cout => \myVGA|ball_b[1]~11\);
|
||
|
|
|
||
|
|
-- Location: FF_X36_Y69_N11
|
||
|
|
\myVGA|ball_b[1]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_b[1]~10_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_b\(1));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N2
|
||
|
|
\myVGA|B[1]~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|B[1]~0_combout\ = (\myVGA|color_mask\(0) & (\myVGA|can_draw~q\ & \myVGA|ball_b\(1)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|color_mask\(0),
|
||
|
|
datac => \myVGA|can_draw~q\,
|
||
|
|
datad => \myVGA|ball_b\(1),
|
||
|
|
combout => \myVGA|B[1]~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N12
|
||
|
|
\myVGA|ball_b[2]~12\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[2]~12_combout\ = (\myVGA|ball_b\(2) & (\myVGA|ball_b[1]~11\ $ (GND))) # (!\myVGA|ball_b\(2) & (!\myVGA|ball_b[1]~11\ & VCC))
|
||
|
|
-- \myVGA|ball_b[2]~13\ = CARRY((\myVGA|ball_b\(2) & !\myVGA|ball_b[1]~11\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010010100001010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_b\(2),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_b[1]~11\,
|
||
|
|
combout => \myVGA|ball_b[2]~12_combout\,
|
||
|
|
cout => \myVGA|ball_b[2]~13\);
|
||
|
|
|
||
|
|
-- Location: FF_X36_Y69_N13
|
||
|
|
\myVGA|ball_b[2]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_b[2]~12_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_b\(2));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N28
|
||
|
|
\myVGA|B[2]~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|B[2]~1_combout\ = (\myVGA|color_mask\(0) & (\myVGA|can_draw~q\ & \myVGA|ball_b\(2)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|color_mask\(0),
|
||
|
|
datac => \myVGA|can_draw~q\,
|
||
|
|
datad => \myVGA|ball_b\(2),
|
||
|
|
combout => \myVGA|B[2]~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N14
|
||
|
|
\myVGA|ball_b[3]~14\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[3]~14_combout\ = (\myVGA|ball_b\(3) & (!\myVGA|ball_b[2]~13\)) # (!\myVGA|ball_b\(3) & ((\myVGA|ball_b[2]~13\) # (GND)))
|
||
|
|
-- \myVGA|ball_b[3]~15\ = CARRY((!\myVGA|ball_b[2]~13\) # (!\myVGA|ball_b\(3)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_b\(3),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_b[2]~13\,
|
||
|
|
combout => \myVGA|ball_b[3]~14_combout\,
|
||
|
|
cout => \myVGA|ball_b[3]~15\);
|
||
|
|
|
||
|
|
-- Location: FF_X36_Y69_N15
|
||
|
|
\myVGA|ball_b[3]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_b[3]~14_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_b\(3));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N6
|
||
|
|
\myVGA|B[3]~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|B[3]~2_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(3) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|color_mask\(0),
|
||
|
|
datac => \myVGA|ball_b\(3),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|B[3]~2_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N16
|
||
|
|
\myVGA|ball_b[4]~16\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[4]~16_combout\ = (\myVGA|ball_b\(4) & (\myVGA|ball_b[3]~15\ $ (GND))) # (!\myVGA|ball_b\(4) & (!\myVGA|ball_b[3]~15\ & VCC))
|
||
|
|
-- \myVGA|ball_b[4]~17\ = CARRY((\myVGA|ball_b\(4) & !\myVGA|ball_b[3]~15\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_b\(4),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_b[3]~15\,
|
||
|
|
combout => \myVGA|ball_b[4]~16_combout\,
|
||
|
|
cout => \myVGA|ball_b[4]~17\);
|
||
|
|
|
||
|
|
-- Location: FF_X36_Y69_N17
|
||
|
|
\myVGA|ball_b[4]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_b[4]~16_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_b\(4));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N24
|
||
|
|
\myVGA|B[4]~3\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|B[4]~3_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(4) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000100000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|color_mask\(0),
|
||
|
|
datab => \myVGA|ball_b\(4),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|B[4]~3_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N18
|
||
|
|
\myVGA|ball_b[5]~18\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[5]~18_combout\ = (\myVGA|ball_b\(5) & (!\myVGA|ball_b[4]~17\)) # (!\myVGA|ball_b\(5) & ((\myVGA|ball_b[4]~17\) # (GND)))
|
||
|
|
-- \myVGA|ball_b[5]~19\ = CARRY((!\myVGA|ball_b[4]~17\) # (!\myVGA|ball_b\(5)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0011110000111111",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_b\(5),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_b[4]~17\,
|
||
|
|
combout => \myVGA|ball_b[5]~18_combout\,
|
||
|
|
cout => \myVGA|ball_b[5]~19\);
|
||
|
|
|
||
|
|
-- Location: FF_X36_Y69_N19
|
||
|
|
\myVGA|ball_b[5]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_b[5]~18_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_b\(5));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N26
|
||
|
|
\myVGA|B[5]~4\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|B[5]~4_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(5) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000100000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|color_mask\(0),
|
||
|
|
datab => \myVGA|ball_b\(5),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|B[5]~4_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N20
|
||
|
|
\myVGA|ball_b[6]~20\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[6]~20_combout\ = (\myVGA|ball_b\(6) & (\myVGA|ball_b[5]~19\ $ (GND))) # (!\myVGA|ball_b\(6) & (!\myVGA|ball_b[5]~19\ & VCC))
|
||
|
|
-- \myVGA|ball_b[6]~21\ = CARRY((\myVGA|ball_b\(6) & !\myVGA|ball_b[5]~19\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1100001100001100",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|ball_b\(6),
|
||
|
|
datad => VCC,
|
||
|
|
cin => \myVGA|ball_b[5]~19\,
|
||
|
|
combout => \myVGA|ball_b[6]~20_combout\,
|
||
|
|
cout => \myVGA|ball_b[6]~21\);
|
||
|
|
|
||
|
|
-- Location: FF_X36_Y69_N21
|
||
|
|
\myVGA|ball_b[6]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_b[6]~20_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_b\(6));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N4
|
||
|
|
\myVGA|B[6]~5\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|B[6]~5_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(6) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1000100000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|color_mask\(0),
|
||
|
|
datab => \myVGA|ball_b\(6),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|B[6]~5_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N22
|
||
|
|
\myVGA|ball_b[7]~22\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|ball_b[7]~22_combout\ = \myVGA|ball_b\(7) $ (\myVGA|ball_b[6]~21\)
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0101101001011010",
|
||
|
|
sum_lutc_input => "cin")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|ball_b\(7),
|
||
|
|
cin => \myVGA|ball_b[6]~21\,
|
||
|
|
combout => \myVGA|ball_b[7]~22_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X36_Y69_N23
|
||
|
|
\myVGA|ball_b[7]\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|ball_b[7]~22_combout\,
|
||
|
|
ena => \myVGA|ball_b[0]~7_combout\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|ball_b\(7));
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X36_Y69_N30
|
||
|
|
\myVGA|B[7]~6\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|B[7]~6_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(7) & \myVGA|can_draw~q\))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1010000000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|color_mask\(0),
|
||
|
|
datac => \myVGA|ball_b\(7),
|
||
|
|
datad => \myVGA|can_draw~q\,
|
||
|
|
combout => \myVGA|B[7]~6_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N28
|
||
|
|
\myVGA|H_SYNC_GEN~0\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|H_SYNC_GEN~0_combout\ = (\myVGA|h_px_count\(9) & (\myVGA|h_px_count\(7) & !\myVGA|h_px_count\(8)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000000010100000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(9),
|
||
|
|
datac => \myVGA|h_px_count\(7),
|
||
|
|
datad => \myVGA|h_px_count\(8),
|
||
|
|
combout => \myVGA|H_SYNC_GEN~0_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N0
|
||
|
|
\myVGA|H_SYNC_GEN~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|H_SYNC_GEN~1_combout\ = (\myVGA|H_SYNC_GEN~0_combout\ & ((\myVGA|h_px_count\(4) & ((!\myVGA|h_px_count\(6)) # (!\myVGA|h_px_count\(5)))) # (!\myVGA|h_px_count\(4) & ((\myVGA|h_px_count\(5)) # (\myVGA|h_px_count\(6))))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0100110011001000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|h_px_count\(4),
|
||
|
|
datab => \myVGA|H_SYNC_GEN~0_combout\,
|
||
|
|
datac => \myVGA|h_px_count\(5),
|
||
|
|
datad => \myVGA|h_px_count\(6),
|
||
|
|
combout => \myVGA|H_SYNC_GEN~1_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N1
|
||
|
|
\myVGA|HS\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|H_SYNC_GEN~1_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|HS~q\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X35_Y67_N30
|
||
|
|
\myVGA|V_SYNC_GEN~1\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|V_SYNC_GEN~1_combout\ = (\myVGA|v_px_count\(2)) # ((\myVGA|v_px_count\(4)) # ((\myVGA|v_px_count\(9)) # (!\myVGA|v_px_count\(3))))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "1111111111101111",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
dataa => \myVGA|v_px_count\(2),
|
||
|
|
datab => \myVGA|v_px_count\(4),
|
||
|
|
datac => \myVGA|v_px_count\(3),
|
||
|
|
datad => \myVGA|v_px_count\(9),
|
||
|
|
combout => \myVGA|V_SYNC_GEN~1_combout\);
|
||
|
|
|
||
|
|
-- Location: LCCOMB_X34_Y67_N2
|
||
|
|
\myVGA|V_SYNC_GEN~2\ : cycloneive_lcell_comb
|
||
|
|
-- Equation(s):
|
||
|
|
-- \myVGA|V_SYNC_GEN~2_combout\ = (\myVGA|V_SYNC_GEN~0_combout\ & (!\myVGA|V_SYNC_GEN~1_combout\ & \myVGA|v_px_count\(1)))
|
||
|
|
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
lut_mask => "0000110000000000",
|
||
|
|
sum_lutc_input => "datac")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
datab => \myVGA|V_SYNC_GEN~0_combout\,
|
||
|
|
datac => \myVGA|V_SYNC_GEN~1_combout\,
|
||
|
|
datad => \myVGA|v_px_count\(1),
|
||
|
|
combout => \myVGA|V_SYNC_GEN~2_combout\);
|
||
|
|
|
||
|
|
-- Location: FF_X34_Y67_N3
|
||
|
|
\myVGA|VS\ : dffeas
|
||
|
|
-- pragma translate_off
|
||
|
|
GENERIC MAP (
|
||
|
|
is_wysiwyg => "true",
|
||
|
|
power_up => "low")
|
||
|
|
-- pragma translate_on
|
||
|
|
PORT MAP (
|
||
|
|
clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\,
|
||
|
|
d => \myVGA|V_SYNC_GEN~2_combout\,
|
||
|
|
clrn => \rst~input_o\,
|
||
|
|
devclrn => ww_devclrn,
|
||
|
|
devpor => ww_devpor,
|
||
|
|
q => \myVGA|VS~q\);
|
||
|
|
END structure;
|
||
|
|
|
||
|
|
|