From 4a314484c6b7da75616025b492e3206b08d8cc68 Mon Sep 17 00:00:00 2001 From: Flinner Yuu Date: Sun, 27 Aug 2023 08:41:55 +0300 Subject: [PATCH] first commit --- #vga_io.csv# | 50 + .gitignore | 70 + output_files/vga.cdf | 13 + output_files/vga.sld | 1 + pll.ppf | 9 + pll.qip | 7 + pll.vhd | 351 ++ simulation/modelsim/vga.sft | 1 + simulation/modelsim/vga.vho | 6759 ++++++++++++++++++++++++++ simulation/modelsim/vga_modelsim.xrf | 391 ++ src/greybox_tmp/cbx_args.txt | 58 + src/main.vhd | 52 + src/vga.vhd | 183 + vga.qpf | 31 + vga.qsf | 99 + vga_io.csv | 50 + 16 files changed, 8125 insertions(+) create mode 100644 #vga_io.csv# create mode 100644 .gitignore create mode 100644 output_files/vga.cdf create mode 100644 output_files/vga.sld create mode 100644 pll.ppf create mode 100644 pll.qip create mode 100644 pll.vhd create mode 100644 simulation/modelsim/vga.sft create mode 100644 simulation/modelsim/vga.vho create mode 100644 simulation/modelsim/vga_modelsim.xrf create mode 100644 src/greybox_tmp/cbx_args.txt create mode 100644 src/main.vhd create mode 100644 src/vga.vhd create mode 100644 vga.qpf create mode 100644 vga.qsf create mode 100644 vga_io.csv diff --git a/#vga_io.csv# b/#vga_io.csv# new file mode 100644 index 0000000..29ca827 --- /dev/null +++ b/#vga_io.csv# @@ -0,0 +1,50 @@ +# Copyright (C) 2023 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions +# and other software and tools, and any partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License +# Subscription Agreement, the Intel Quartus Prime License Agreement, +# the Intel FPGA IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Intel and sold by Intel or its authorized distributors. Please +# refer to the applicable agreement for further details, at +# https://fpgasoftware.intel.com/eula. + +# Quartus Prime Version 22.1std.2 Build 922 07/20/2023 SC Lite Edition +# File: /home/lambda/Programs/intelQuartus/projects/vga/vga_io.csv +# Generated on: Sat Aug 26 14:20:03 2023 + +# Note: The column header names should not be changed if you wish to import this .csv file into the Quartus Prime software. + +To,Direction,Location,I/O Bank,VREF Group,Fitter Location,I/O Standard,Reserved,Current Strength,Slew Rate,Differential Pair,Strict Preservation +B[7],Output,PIN_D12,8,B8_N0,PIN_AD1,,,,,, +B[6],Output,,,,PIN_AD2,,,,,, +B[5],Output,,,,PIN_B7,,,,,, +B[4],Output,,,,PIN_AC2,,,,,, +B[3],Output,,,,PIN_T8,,,,,, +B[2],Output,,,,PIN_U6,,,,,, +B[1],Output,,,,PIN_AD3,,,,,, +B[0],Output,,,,PIN_R3,,,,,, +G[7],Output,,,,PIN_AA3,,,,,, +G[6],Output,,,,PIN_D10,,,,,, +G[5],Output,,,,PIN_U4,,,,,, +G[4],Output,,,,PIN_U5,,,,,, +G[3],Output,,,,PIN_AC1,,,,,, +G[2],Output,,,,PIN_Y4,,,,,, +G[1],Output,,,,PIN_AB1,,,,,, +G[0],Output,,,,PIN_R6,,,,,, +HS,Output,,,,PIN_R5,,,,,, +px_clk,Input,,,,PIN_J1,,,,,, +R[7],Output,,,,PIN_Y3,,,,,, +R[6],Output,,,,PIN_U3,,,,,, +R[5],Output,,,,PIN_AC3,,,,,, +R[4],Output,,,,PIN_G23,,,,,, +R[3],Output,,,,PIN_AA4,,,,,, +R[2],Output,,,,PIN_AB2,,,,,, +R[1],Output,,,,PIN_W1,,,,,, +R[0],Output,,,,PIN_AB3,,,,,, +rst,Input,,,,PIN_Y2,,,,,, +VS,Output,,,,PIN_T3,,,,,, diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..fb9e006 --- /dev/null +++ b/.gitignore @@ -0,0 +1,70 @@ +# https://gist.github.com/nhasbun/71918796044b7ba89d6662133495f754 +# Working with Altera Quartus II (Q2) and do proper versioning is not that easy +# but if you follow some rules it can be accomplished. :) +# This file should be placed into the main directory where the .qpf file is +# found. Generally Q2 throws all entities and so on in the main directory, but +# you can place all stuff also in separate folders. This approach is followed +# here. So when you create a new design create one or more folders where your +# entities will be located and put a .gitignore in there that overrides the +# ignores of this file, e.g. one single rule stating "!*" which allows now all +# type of files. When you add a MegaFunction or another entity to your design, +# simply add it to one of your private folders and Q2 will be happy and manage +# everything quite good. When you want to do versioning of your generated +# SOF/POF files, you can do this by redirecting the generated output to an own +# folder. To do this go to: +# "Assignments" +# -> "Settings +# -> "Compilation Process Settings" +# -> "Save project output files in specified directory" +# Now you can either place a .gitignore in the directory and allow the following +# list of types: +# !*.sof +# !*.pof +# or you create an own submodule in the folder to keep binary files out of your +# design. + +# Need to keep all HDL files +# *.vhd +# *.v + +# ignore Quartus II generated files +*_generation_script* +*_inst.vhd +*.bak +*.cmp +*.done +*.eqn +*.hex +*.html +*.jdi +*.jpg +# *.mif +*.pin +*.pof +*.ptf.* +*.qar +*.qarlog +*.qws +*.rpt +*.smsg +*.sof +*.sopc_builder +*.summary +*.tcl +*.txt # Explicitly add any text files used +*~ +*example* +*sopc_* +# *.sdc # I want those timing files + +# ignore Quartus II generated folders +*/db/ +*/incremental_db/ +*/simulation/ +*/timing/ +*/testbench/ +*/*_sim/ +incremental_db/ +db/ +_output_files/ +PLLJ_PLLSPE_INFO.txt diff --git a/output_files/vga.cdf b/output_files/vga.cdf new file mode 100644 index 0000000..d595a53 --- /dev/null +++ b/output_files/vga.cdf @@ -0,0 +1,13 @@ +/* Quartus Prime Version 22.1std.2 Build 922 07/20/2023 SC Lite Edition */ +JedecChain; + FileRevision(JESD32A); + DefaultMfr(6E); + + P ActionCode(Cfg) + Device PartName(EP4CE115F29) Path("/home/lambda/Programs/intelQuartus/projects/vga/output_files/") File("vga.sof") MfrSpec(OpMask(1)); + +ChainEnd; + +AlteraBegin; + ChainType(JTAG); +AlteraEnd; diff --git a/output_files/vga.sld b/output_files/vga.sld new file mode 100644 index 0000000..f7d3ed7 --- /dev/null +++ b/output_files/vga.sld @@ -0,0 +1 @@ + diff --git a/pll.ppf b/pll.ppf new file mode 100644 index 0000000..523b747 --- /dev/null +++ b/pll.ppf @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/pll.qip b/pll.qip new file mode 100644 index 0000000..f2fe74a --- /dev/null +++ b/pll.qip @@ -0,0 +1,7 @@ +set_global_assignment -name IP_TOOL_NAME "ALTPLL" +set_global_assignment -name IP_TOOL_VERSION "22.1" +set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}" +set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "pll.vhd"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_inst.vhd"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.cmp"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.ppf"] diff --git a/pll.vhd b/pll.vhd new file mode 100644 index 0000000..6d24c7d --- /dev/null +++ b/pll.vhd @@ -0,0 +1,351 @@ +-- megafunction wizard: %ALTPLL% +-- GENERATION: STANDARD +-- VERSION: WM1.0 +-- MODULE: altpll + +-- ============================================================ +-- File Name: pll.vhd +-- Megafunction Name(s): +-- altpll +-- +-- Simulation Library Files(s): +-- altera_mf +-- ============================================================ +-- ************************************************************ +-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +-- +-- 22.1std.2 Build 922 07/20/2023 SC Lite Edition +-- ************************************************************ + + +--Copyright (C) 2023 Intel Corporation. All rights reserved. +--Your use of Intel Corporation's design tools, logic functions +--and other software and tools, and any partner logic +--functions, and any output files from any of the foregoing +--(including device programming or simulation files), and any +--associated documentation or information are expressly subject +--to the terms and conditions of the Intel Program License +--Subscription Agreement, the Intel Quartus Prime License Agreement, +--the Intel FPGA IP License Agreement, or other applicable license +--agreement, including, without limitation, that your use is for +--the sole purpose of programming logic devices manufactured by +--Intel and sold by Intel or its authorized distributors. Please +--refer to the applicable agreement for further details, at +--https://fpgasoftware.intel.com/eula. + + +LIBRARY ieee; +USE ieee.std_logic_1164.all; + +LIBRARY altera_mf; +USE altera_mf.all; + +ENTITY pll IS + PORT + ( + inclk0 : IN STD_LOGIC := '0'; + c0 : OUT STD_LOGIC + ); +END pll; + + +ARCHITECTURE SYN OF pll IS + + SIGNAL sub_wire0 : STD_LOGIC_VECTOR (4 DOWNTO 0); + SIGNAL sub_wire1 : STD_LOGIC ; + SIGNAL sub_wire2 : STD_LOGIC ; + SIGNAL sub_wire3 : STD_LOGIC_VECTOR (1 DOWNTO 0); + SIGNAL sub_wire4_bv : BIT_VECTOR (0 DOWNTO 0); + SIGNAL sub_wire4 : STD_LOGIC_VECTOR (0 DOWNTO 0); + + + + COMPONENT altpll + GENERIC ( + bandwidth_type : STRING; + clk0_divide_by : NATURAL; + clk0_duty_cycle : NATURAL; + clk0_multiply_by : NATURAL; + clk0_phase_shift : STRING; + compensate_clock : STRING; + inclk0_input_frequency : NATURAL; + intended_device_family : STRING; + lpm_hint : STRING; + lpm_type : STRING; + operation_mode : STRING; + pll_type : STRING; + port_activeclock : STRING; + port_areset : STRING; + port_clkbad0 : STRING; + port_clkbad1 : STRING; + port_clkloss : STRING; + port_clkswitch : STRING; + port_configupdate : STRING; + port_fbin : STRING; + port_inclk0 : STRING; + port_inclk1 : STRING; + port_locked : STRING; + port_pfdena : STRING; + port_phasecounterselect : STRING; + port_phasedone : STRING; + port_phasestep : STRING; + port_phaseupdown : STRING; + port_pllena : STRING; + port_scanaclr : STRING; + port_scanclk : STRING; + port_scanclkena : STRING; + port_scandata : STRING; + port_scandataout : STRING; + port_scandone : STRING; + port_scanread : STRING; + port_scanwrite : STRING; + port_clk0 : STRING; + port_clk1 : STRING; + port_clk2 : STRING; + port_clk3 : STRING; + port_clk4 : STRING; + port_clk5 : STRING; + port_clkena0 : STRING; + port_clkena1 : STRING; + port_clkena2 : STRING; + port_clkena3 : STRING; + port_clkena4 : STRING; + port_clkena5 : STRING; + port_extclk0 : STRING; + port_extclk1 : STRING; + port_extclk2 : STRING; + port_extclk3 : STRING; + width_clock : NATURAL + ); + PORT ( + inclk : IN STD_LOGIC_VECTOR (1 DOWNTO 0); + clk : OUT STD_LOGIC_VECTOR (4 DOWNTO 0) + ); + END COMPONENT; + +BEGIN + sub_wire4_bv(0 DOWNTO 0) <= "0"; + sub_wire4 <= To_stdlogicvector(sub_wire4_bv); + sub_wire1 <= sub_wire0(0); + c0 <= sub_wire1; + sub_wire2 <= inclk0; + sub_wire3 <= sub_wire4(0 DOWNTO 0) & sub_wire2; + + altpll_component : altpll + GENERIC MAP ( + bandwidth_type => "AUTO", + clk0_divide_by => 2000, + clk0_duty_cycle => 50, + clk0_multiply_by => 1007, + clk0_phase_shift => "0", + compensate_clock => "CLK0", + inclk0_input_frequency => 20000, + intended_device_family => "Cyclone IV E", + lpm_hint => "CBX_MODULE_PREFIX=pll", + lpm_type => "altpll", + operation_mode => "NORMAL", + pll_type => "AUTO", + port_activeclock => "PORT_UNUSED", + port_areset => "PORT_UNUSED", + port_clkbad0 => "PORT_UNUSED", + port_clkbad1 => "PORT_UNUSED", + port_clkloss => "PORT_UNUSED", + port_clkswitch => "PORT_UNUSED", + port_configupdate => "PORT_UNUSED", + port_fbin => "PORT_UNUSED", + port_inclk0 => "PORT_USED", + port_inclk1 => "PORT_UNUSED", + port_locked => "PORT_UNUSED", + port_pfdena => "PORT_UNUSED", + port_phasecounterselect => "PORT_UNUSED", + port_phasedone => "PORT_UNUSED", + port_phasestep => "PORT_UNUSED", + port_phaseupdown => "PORT_UNUSED", + port_pllena => "PORT_UNUSED", + port_scanaclr => "PORT_UNUSED", + port_scanclk => "PORT_UNUSED", + port_scanclkena => "PORT_UNUSED", + port_scandata => "PORT_UNUSED", + port_scandataout => "PORT_UNUSED", + port_scandone => "PORT_UNUSED", + port_scanread => "PORT_UNUSED", + port_scanwrite => "PORT_UNUSED", + port_clk0 => "PORT_USED", + port_clk1 => "PORT_UNUSED", + port_clk2 => "PORT_UNUSED", + port_clk3 => "PORT_UNUSED", + port_clk4 => "PORT_UNUSED", + port_clk5 => "PORT_UNUSED", + port_clkena0 => "PORT_UNUSED", + port_clkena1 => "PORT_UNUSED", + port_clkena2 => "PORT_UNUSED", + port_clkena3 => "PORT_UNUSED", + port_clkena4 => "PORT_UNUSED", + port_clkena5 => "PORT_UNUSED", + port_extclk0 => "PORT_UNUSED", + port_extclk1 => "PORT_UNUSED", + port_extclk2 => "PORT_UNUSED", + port_extclk3 => "PORT_UNUSED", + width_clock => 5 + ) + PORT MAP ( + inclk => sub_wire3, + clk => sub_wire0 + ); + + + +END SYN; + +-- ============================================================ +-- CNX file retrieval info +-- ============================================================ +-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" +-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" +-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1" +-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" +-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" +-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" +-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" +-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" +-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" +-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" +-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" +-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" +-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" +-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" +-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" +-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any" +-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "25.174999" +-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" +-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" +-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" +-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" +-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" +-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" +-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" +-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000" +-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" +-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" +-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" +-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" +-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" +-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" +-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0" +-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" +-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" +-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" +-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" +-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1" +-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" +-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "25.17500000" +-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1" +-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1" +-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" +-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" +-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" +-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" +-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" +-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" +-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" +-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0" +-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" +-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" +-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0" +-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" +-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll.mif" +-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" +-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1" +-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0" +-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" +-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" +-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" +-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" +-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" +-- Retrieval info: PRIVATE: SPREAD_USE STRING "0" +-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" +-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" +-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" +-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +-- Retrieval info: PRIVATE: USE_CLK0 STRING "1" +-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" +-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" +-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO" +-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "2000" +-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" +-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1007" +-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" +-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000" +-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" +-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" +-- Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" +-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED" +-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" +-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED" +-- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5" +-- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]" +-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]" +-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" +-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" +-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 +-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 +-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.vhd TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.inc FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.cmp TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL pll.bsf FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_inst.vhd TRUE +-- Retrieval info: LIB_FILE: altera_mf +-- Retrieval info: CBX_MODULE_PREFIX: ON diff --git a/simulation/modelsim/vga.sft b/simulation/modelsim/vga.sft new file mode 100644 index 0000000..db19f3f --- /dev/null +++ b/simulation/modelsim/vga.sft @@ -0,0 +1 @@ +set tool_name "ModelSim (VHDL)" diff --git a/simulation/modelsim/vga.vho b/simulation/modelsim/vga.vho new file mode 100644 index 0000000..0b43a3a --- /dev/null +++ b/simulation/modelsim/vga.vho @@ -0,0 +1,6759 @@ +-- Copyright (C) 2023 Intel Corporation. All rights reserved. +-- Your use of Intel Corporation's design tools, logic functions +-- and other software and tools, and any partner logic +-- functions, and any output files from any of the foregoing +-- (including device programming or simulation files), and any +-- associated documentation or information are expressly subject +-- to the terms and conditions of the Intel Program License +-- Subscription Agreement, the Intel Quartus Prime License Agreement, +-- the Intel FPGA IP License Agreement, or other applicable license +-- agreement, including, without limitation, that your use is for +-- the sole purpose of programming logic devices manufactured by +-- Intel and sold by Intel or its authorized distributors. Please +-- refer to the applicable agreement for further details, at +-- https://fpgasoftware.intel.com/eula. + +-- VENDOR "Altera" +-- PROGRAM "Quartus Prime" +-- VERSION "Version 22.1std.2 Build 922 07/20/2023 SC Lite Edition" + +-- DATE "08/27/2023 01:29:16" + +-- +-- Device: Altera EP4CE115F29C7 Package FBGA780 +-- + +-- +-- This VHDL file should be used for ModelSim (VHDL) only +-- + +LIBRARY ALTERA; +LIBRARY CYCLONEIVE; +LIBRARY IEEE; +USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL; +USE CYCLONEIVE.CYCLONEIVE_COMPONENTS.ALL; +USE IEEE.STD_LOGIC_1164.ALL; + +ENTITY MAIN IS + PORT ( + VGA_BLANK : BUFFER std_logic; + VGA_SYNC : BUFFER std_logic; + VGA_CLK : BUFFER std_logic; + clk : IN std_logic; + rst : IN std_logic; + R : BUFFER std_logic_vector(7 DOWNTO 0); + G : BUFFER std_logic_vector(7 DOWNTO 0); + B : BUFFER std_logic_vector(7 DOWNTO 0); + HS : BUFFER std_logic; + VS : BUFFER std_logic + ); +END MAIN; + +-- Design Ports Information +-- VGA_BLANK => Location: PIN_F11, I/O Standard: 2.5 V, Current Strength: Default +-- VGA_SYNC => Location: PIN_C10, I/O Standard: 2.5 V, Current Strength: Default +-- VGA_CLK => Location: PIN_A12, I/O Standard: 2.5 V, Current Strength: Default +-- R[0] => Location: PIN_E12, I/O Standard: 2.5 V, Current Strength: Default +-- R[1] => Location: PIN_E11, I/O Standard: 2.5 V, Current Strength: Default +-- R[2] => Location: PIN_D10, I/O Standard: 2.5 V, Current Strength: Default +-- R[3] => Location: PIN_F12, I/O Standard: 2.5 V, Current Strength: Default +-- R[4] => Location: PIN_G10, I/O Standard: 2.5 V, Current Strength: Default +-- R[5] => Location: PIN_J12, I/O Standard: 2.5 V, Current Strength: Default +-- R[6] => Location: PIN_H8, I/O Standard: 2.5 V, Current Strength: Default +-- R[7] => Location: PIN_H10, I/O Standard: 2.5 V, Current Strength: Default +-- G[0] => Location: PIN_G8, I/O Standard: 2.5 V, Current Strength: Default +-- G[1] => Location: PIN_G11, I/O Standard: 2.5 V, Current Strength: Default +-- G[2] => Location: PIN_F8, I/O Standard: 2.5 V, Current Strength: Default +-- G[3] => Location: PIN_H12, I/O Standard: 2.5 V, Current Strength: Default +-- G[4] => Location: PIN_C8, I/O Standard: 2.5 V, Current Strength: Default +-- G[5] => Location: PIN_B8, I/O Standard: 2.5 V, Current Strength: Default +-- G[6] => Location: PIN_F10, I/O Standard: 2.5 V, Current Strength: Default +-- G[7] => Location: PIN_C9, I/O Standard: 2.5 V, Current Strength: Default +-- B[0] => Location: PIN_B10, I/O Standard: 2.5 V, Current Strength: Default +-- B[1] => Location: PIN_A10, I/O Standard: 2.5 V, Current Strength: Default +-- B[2] => Location: PIN_C11, I/O Standard: 2.5 V, Current Strength: Default +-- B[3] => Location: PIN_B11, I/O Standard: 2.5 V, Current Strength: Default +-- B[4] => Location: PIN_A11, I/O Standard: 2.5 V, Current Strength: Default +-- B[5] => Location: PIN_C12, I/O Standard: 2.5 V, Current Strength: Default +-- B[6] => Location: PIN_D11, I/O Standard: 2.5 V, Current Strength: Default +-- B[7] => Location: PIN_D12, I/O Standard: 2.5 V, Current Strength: Default +-- HS => Location: PIN_G13, I/O Standard: 2.5 V, Current Strength: Default +-- VS => Location: PIN_C13, I/O Standard: 2.5 V, Current Strength: Default +-- clk => Location: PIN_AG14, I/O Standard: 2.5 V, Current Strength: Default +-- rst => Location: PIN_R24, I/O Standard: 2.5 V, Current Strength: Default + + +ARCHITECTURE structure OF MAIN IS +SIGNAL gnd : std_logic := '0'; +SIGNAL vcc : std_logic := '1'; +SIGNAL unknown : std_logic := 'X'; +SIGNAL devoe : std_logic := '1'; +SIGNAL devclrn : std_logic := '1'; +SIGNAL devpor : std_logic := '1'; +SIGNAL ww_devoe : std_logic; +SIGNAL ww_devclrn : std_logic; +SIGNAL ww_devpor : std_logic; +SIGNAL ww_VGA_BLANK : std_logic; +SIGNAL ww_VGA_SYNC : std_logic; +SIGNAL ww_VGA_CLK : std_logic; +SIGNAL ww_clk : std_logic; +SIGNAL ww_rst : std_logic; +SIGNAL ww_R : std_logic_vector(7 DOWNTO 0); +SIGNAL ww_G : std_logic_vector(7 DOWNTO 0); +SIGNAL ww_B : std_logic_vector(7 DOWNTO 0); +SIGNAL ww_HS : std_logic; +SIGNAL ww_VS : std_logic; +SIGNAL \myPLL|altpll_component|auto_generated|pll1_INCLK_bus\ : std_logic_vector(1 DOWNTO 0); +SIGNAL \myPLL|altpll_component|auto_generated|pll1_CLK_bus\ : std_logic_vector(4 DOWNTO 0); +SIGNAL \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0); +SIGNAL \~ALTERA_ASDO_DATA1~~ibuf_o\ : std_logic; +SIGNAL \~ALTERA_ASDO_DATA1~~padout\ : std_logic; +SIGNAL \~ALTERA_FLASH_nCE_nCSO~~ibuf_o\ : std_logic; +SIGNAL \~ALTERA_FLASH_nCE_nCSO~~padout\ : std_logic; +SIGNAL \~ALTERA_DCLK~~padout\ : std_logic; +SIGNAL \~ALTERA_DATA0~~ibuf_o\ : std_logic; +SIGNAL \~ALTERA_DATA0~~padout\ : std_logic; +SIGNAL \~ALTERA_nCEO~~padout\ : std_logic; +SIGNAL \~ALTERA_DCLK~~obuf_o\ : std_logic; +SIGNAL \~ALTERA_nCEO~~obuf_o\ : std_logic; +SIGNAL \clk~input_o\ : std_logic; +SIGNAL \myPLL|altpll_component|auto_generated|wire_pll1_fbout\ : std_logic; +SIGNAL \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\ : std_logic; +SIGNAL \myVGA|h_px_count[0]~10_combout\ : std_logic; +SIGNAL \rst~input_o\ : std_logic; +SIGNAL \myVGA|LessThan0~0_combout\ : std_logic; +SIGNAL \myVGA|LessThan0~1_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[0]~11\ : std_logic; +SIGNAL \myVGA|h_px_count[1]~12_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[1]~13\ : std_logic; +SIGNAL \myVGA|h_px_count[2]~14_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[2]~15\ : std_logic; +SIGNAL \myVGA|h_px_count[3]~16_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[3]~17\ : std_logic; +SIGNAL \myVGA|h_px_count[4]~18_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[4]~19\ : std_logic; +SIGNAL \myVGA|h_px_count[5]~20_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[5]~21\ : std_logic; +SIGNAL \myVGA|h_px_count[6]~22_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[6]~23\ : std_logic; +SIGNAL \myVGA|h_px_count[7]~24_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[7]~25\ : std_logic; +SIGNAL \myVGA|h_px_count[8]~26_combout\ : std_logic; +SIGNAL \myVGA|h_px_count[8]~27\ : std_logic; +SIGNAL \myVGA|h_px_count[9]~28_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:ball_speed_x[1]~0_combout\ : std_logic; +SIGNAL \myVGA|Add1~0_combout\ : std_logic; +SIGNAL \myVGA|v_px_count[9]~0_combout\ : std_logic; +SIGNAL \myVGA|Add1~1\ : std_logic; +SIGNAL \myVGA|Add1~3\ : std_logic; +SIGNAL \myVGA|Add1~4_combout\ : std_logic; +SIGNAL \myVGA|v_px_count[2]~3_combout\ : std_logic; +SIGNAL \myVGA|Add1~5\ : std_logic; +SIGNAL \myVGA|Add1~6_combout\ : std_logic; +SIGNAL \myVGA|v_px_count[3]~4_combout\ : std_logic; +SIGNAL \myVGA|Add1~7\ : std_logic; +SIGNAL \myVGA|Add1~8_combout\ : std_logic; +SIGNAL \myVGA|Add1~9\ : std_logic; +SIGNAL \myVGA|Add1~10_combout\ : std_logic; +SIGNAL \myVGA|Add1~11\ : std_logic; +SIGNAL \myVGA|Add1~12_combout\ : std_logic; +SIGNAL \myVGA|Add1~13\ : std_logic; +SIGNAL \myVGA|Add1~14_combout\ : std_logic; +SIGNAL \myVGA|Add1~15\ : std_logic; +SIGNAL \myVGA|Add1~16_combout\ : std_logic; +SIGNAL \myVGA|Add1~17\ : std_logic; +SIGNAL \myVGA|Add1~18_combout\ : std_logic; +SIGNAL \myVGA|v_px_count[9]~2_combout\ : std_logic; +SIGNAL \myVGA|Equal0~1_combout\ : std_logic; +SIGNAL \myVGA|Equal0~0_combout\ : std_logic; +SIGNAL \myVGA|Equal0~2_combout\ : std_logic; +SIGNAL \myVGA|v_px_count[1]~1_combout\ : std_logic; +SIGNAL \myVGA|Add1~2_combout\ : std_logic; +SIGNAL \myVGA|v_px_count[1]~5_combout\ : std_logic; +SIGNAL \myVGA|Equal1~0_combout\ : std_logic; +SIGNAL \myVGA|Equal1~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[0]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[0]~q\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[0]~2\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[1]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[1]~q\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[1]~2\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[2]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[2]~q\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[2]~2\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[3]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[3]~q\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[3]~2\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[4]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[4]~q\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[4]~2\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[5]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[5]~q\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[5]~2\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[6]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[6]~q\ : std_logic; +SIGNAL \myVGA|LessThan7~0_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[6]~2\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[7]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[7]~q\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[7]~2\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[8]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:count[8]~q\ : std_logic; +SIGNAL \myVGA|LessThan7~1_combout\ : std_logic; +SIGNAL \myVGA|ball_b[0]~7_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:ball_speed_x[1]~q\ : std_logic; +SIGNAL \myVGA|ball_b[0]~24_combout\ : std_logic; +SIGNAL \myVGA|ball_x[1]~10_cout\ : std_logic; +SIGNAL \myVGA|ball_x[1]~11_combout\ : std_logic; +SIGNAL \myVGA|ball_x[1]~12\ : std_logic; +SIGNAL \myVGA|ball_x[2]~13_combout\ : std_logic; +SIGNAL \myVGA|ball_x[2]~14\ : std_logic; +SIGNAL \myVGA|ball_x[3]~15_combout\ : std_logic; +SIGNAL \myVGA|ball_x[3]~16\ : std_logic; +SIGNAL \myVGA|ball_x[4]~17_combout\ : std_logic; +SIGNAL \myVGA|ball_x[4]~18\ : std_logic; +SIGNAL \myVGA|ball_x[5]~19_combout\ : std_logic; +SIGNAL \myVGA|Add19~0_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[9]~q\ : std_logic; +SIGNAL \myVGA|Add18~0_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[0]~q\ : std_logic; +SIGNAL \myVGA|Add18~1\ : std_logic; +SIGNAL \myVGA|Add18~2_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[1]~q\ : std_logic; +SIGNAL \myVGA|Add18~3\ : std_logic; +SIGNAL \myVGA|Add18~4_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[2]~q\ : std_logic; +SIGNAL \myVGA|Add18~5\ : std_logic; +SIGNAL \myVGA|Add18~6_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[3]~q\ : std_logic; +SIGNAL \myVGA|Add18~7\ : std_logic; +SIGNAL \myVGA|Add18~8_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[4]~q\ : std_logic; +SIGNAL \myVGA|Add18~9\ : std_logic; +SIGNAL \myVGA|Add18~10_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[5]~q\ : std_logic; +SIGNAL \myVGA|Add18~11\ : std_logic; +SIGNAL \myVGA|Add18~12_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[6]~q\ : std_logic; +SIGNAL \myVGA|Add18~13\ : std_logic; +SIGNAL \myVGA|Add18~14_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[7]~q\ : std_logic; +SIGNAL \myVGA|Add18~15\ : std_logic; +SIGNAL \myVGA|Add18~16_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:count[8]~q\ : std_logic; +SIGNAL \myVGA|Add18~17\ : std_logic; +SIGNAL \myVGA|Add18~18_combout\ : std_logic; +SIGNAL \myVGA|BALL_WIDTH[5]~2_combout\ : std_logic; +SIGNAL \myVGA|BALL_WIDTH[5]~1_combout\ : std_logic; +SIGNAL \myVGA|BALL_WIDTH[5]~0_combout\ : std_logic; +SIGNAL \myVGA|BALL_WIDTH[5]~3_combout\ : std_logic; +SIGNAL \myVGA|Add19~1\ : std_logic; +SIGNAL \myVGA|Add19~2_combout\ : std_logic; +SIGNAL \myVGA|BALL_WIDTH[1]~5_combout\ : std_logic; +SIGNAL \myVGA|Add19~3\ : std_logic; +SIGNAL \myVGA|Add19~4_combout\ : std_logic; +SIGNAL \myVGA|growth~0_combout\ : std_logic; +SIGNAL \myVGA|vary_ball_width:growth[1]~q\ : std_logic; +SIGNAL \myVGA|Add19~5\ : std_logic; +SIGNAL \myVGA|Add19~6_combout\ : std_logic; +SIGNAL \myVGA|BALL_WIDTH[3]~4_combout\ : std_logic; +SIGNAL \myVGA|Add19~7\ : std_logic; +SIGNAL \myVGA|Add19~8_combout\ : std_logic; +SIGNAL \myVGA|growth~1_combout\ : std_logic; +SIGNAL \myVGA|growth~2_combout\ : std_logic; +SIGNAL \myVGA|Add19~9\ : std_logic; +SIGNAL \myVGA|Add19~10_combout\ : std_logic; +SIGNAL \myVGA|LessThan10~1_cout\ : std_logic; +SIGNAL \myVGA|LessThan10~3_cout\ : std_logic; +SIGNAL \myVGA|LessThan10~5_cout\ : std_logic; +SIGNAL \myVGA|LessThan10~7_cout\ : std_logic; +SIGNAL \myVGA|LessThan10~9_cout\ : std_logic; +SIGNAL \myVGA|LessThan10~10_combout\ : std_logic; +SIGNAL \myVGA|ball_x[5]~20\ : std_logic; +SIGNAL \myVGA|ball_x[6]~21_combout\ : std_logic; +SIGNAL \myVGA|ball_x[6]~22\ : std_logic; +SIGNAL \myVGA|ball_x[7]~23_combout\ : std_logic; +SIGNAL \myVGA|LessThan10~12_combout\ : std_logic; +SIGNAL \myVGA|Add3~1\ : std_logic; +SIGNAL \myVGA|Add3~3\ : std_logic; +SIGNAL \myVGA|Add3~5\ : std_logic; +SIGNAL \myVGA|Add3~6_combout\ : std_logic; +SIGNAL \myVGA|Add3~7\ : std_logic; +SIGNAL \myVGA|Add3~8_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~6_combout\ : std_logic; +SIGNAL \myVGA|Add3~9\ : std_logic; +SIGNAL \myVGA|Add3~10_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~7_combout\ : std_logic; +SIGNAL \myVGA|ball_x[7]~24\ : std_logic; +SIGNAL \myVGA|ball_x[8]~25_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~0_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~1_combout\ : std_logic; +SIGNAL \myVGA|Add3~0_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~2_combout\ : std_logic; +SIGNAL \myVGA|Add3~2_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~3_combout\ : std_logic; +SIGNAL \myVGA|Add3~4_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~4_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~5_combout\ : std_logic; +SIGNAL \myVGA|LessThan8~8_combout\ : std_logic; +SIGNAL \myVGA|ball_speed_x~0_combout\ : std_logic; +SIGNAL \myVGA|ball_x[8]~26\ : std_logic; +SIGNAL \myVGA|ball_x[9]~27_combout\ : std_logic; +SIGNAL \myVGA|Add14~1\ : std_logic; +SIGNAL \myVGA|Add14~3\ : std_logic; +SIGNAL \myVGA|Add14~5\ : std_logic; +SIGNAL \myVGA|Add14~7\ : std_logic; +SIGNAL \myVGA|Add14~9\ : std_logic; +SIGNAL \myVGA|Add14~11\ : std_logic; +SIGNAL \myVGA|Add14~13\ : std_logic; +SIGNAL \myVGA|Add14~15\ : std_logic; +SIGNAL \myVGA|Add14~17\ : std_logic; +SIGNAL \myVGA|Add14~18_combout\ : std_logic; +SIGNAL \myVGA|Add14~16_combout\ : std_logic; +SIGNAL \myVGA|Add14~14_combout\ : std_logic; +SIGNAL \myVGA|Add14~12_combout\ : std_logic; +SIGNAL \myVGA|Add14~10_combout\ : std_logic; +SIGNAL \myVGA|Add14~8_combout\ : std_logic; +SIGNAL \myVGA|Add14~6_combout\ : std_logic; +SIGNAL \myVGA|Add14~4_combout\ : std_logic; +SIGNAL \myVGA|Add14~2_combout\ : std_logic; +SIGNAL \myVGA|Add14~0_combout\ : std_logic; +SIGNAL \myVGA|LessThan12~1_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~3_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~5_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~7_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~9_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~11_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~13_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~15_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~17_cout\ : std_logic; +SIGNAL \myVGA|LessThan12~18_combout\ : std_logic; +SIGNAL \myVGA|ball_y[1]~9_cout\ : std_logic; +SIGNAL \myVGA|ball_y[1]~10_combout\ : std_logic; +SIGNAL \myVGA|ball_y[1]~11\ : std_logic; +SIGNAL \myVGA|ball_y[2]~12_combout\ : std_logic; +SIGNAL \myVGA|ball_y[2]~13\ : std_logic; +SIGNAL \myVGA|ball_y[3]~14_combout\ : std_logic; +SIGNAL \myVGA|ball_y[3]~15\ : std_logic; +SIGNAL \myVGA|ball_y[4]~16_combout\ : std_logic; +SIGNAL \myVGA|ball_y[4]~17\ : std_logic; +SIGNAL \myVGA|ball_y[5]~18_combout\ : std_logic; +SIGNAL \myVGA|ball_y[5]~19\ : std_logic; +SIGNAL \myVGA|ball_y[6]~20_combout\ : std_logic; +SIGNAL \myVGA|LessThan11~1_cout\ : std_logic; +SIGNAL \myVGA|LessThan11~3_cout\ : std_logic; +SIGNAL \myVGA|LessThan11~5_cout\ : std_logic; +SIGNAL \myVGA|LessThan11~7_cout\ : std_logic; +SIGNAL \myVGA|LessThan11~9_cout\ : std_logic; +SIGNAL \myVGA|LessThan11~10_combout\ : std_logic; +SIGNAL \myVGA|Add5~1\ : std_logic; +SIGNAL \myVGA|Add5~3\ : std_logic; +SIGNAL \myVGA|Add5~5\ : std_logic; +SIGNAL \myVGA|Add5~7\ : std_logic; +SIGNAL \myVGA|Add5~9\ : std_logic; +SIGNAL \myVGA|Add5~10_combout\ : std_logic; +SIGNAL \myVGA|Add5~8_combout\ : std_logic; +SIGNAL \myVGA|Add5~6_combout\ : std_logic; +SIGNAL \myVGA|Add5~4_combout\ : std_logic; +SIGNAL \myVGA|Add5~2_combout\ : std_logic; +SIGNAL \myVGA|Add5~0_combout\ : std_logic; +SIGNAL \myVGA|LessThan9~1_cout\ : std_logic; +SIGNAL \myVGA|LessThan9~3_cout\ : std_logic; +SIGNAL \myVGA|LessThan9~5_cout\ : std_logic; +SIGNAL \myVGA|LessThan9~7_cout\ : std_logic; +SIGNAL \myVGA|LessThan9~9_cout\ : std_logic; +SIGNAL \myVGA|LessThan9~11_cout\ : std_logic; +SIGNAL \myVGA|LessThan9~12_combout\ : std_logic; +SIGNAL \myVGA|ball_speed_y~0_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:ball_speed_y[1]~0_combout\ : std_logic; +SIGNAL \myVGA|ball_bounce:ball_speed_y[1]~q\ : std_logic; +SIGNAL \myVGA|ball_y[6]~21\ : std_logic; +SIGNAL \myVGA|ball_y[7]~22_combout\ : std_logic; +SIGNAL \myVGA|ball_speed_y~1_combout\ : std_logic; +SIGNAL \myVGA|ball_y[7]~23\ : std_logic; +SIGNAL \myVGA|ball_y[8]~24_combout\ : std_logic; +SIGNAL \myVGA|Add16~1\ : std_logic; +SIGNAL \myVGA|Add16~3\ : std_logic; +SIGNAL \myVGA|Add16~5\ : std_logic; +SIGNAL \myVGA|Add16~7\ : std_logic; +SIGNAL \myVGA|Add16~9\ : std_logic; +SIGNAL \myVGA|Add16~11\ : std_logic; +SIGNAL \myVGA|Add16~13\ : std_logic; +SIGNAL \myVGA|Add16~15\ : std_logic; +SIGNAL \myVGA|Add16~17\ : std_logic; +SIGNAL \myVGA|Add16~18_combout\ : std_logic; +SIGNAL \myVGA|Add16~16_combout\ : std_logic; +SIGNAL \myVGA|Add16~14_combout\ : std_logic; +SIGNAL \myVGA|Add16~12_combout\ : std_logic; +SIGNAL \myVGA|Add16~10_combout\ : std_logic; +SIGNAL \myVGA|Add16~8_combout\ : std_logic; +SIGNAL \myVGA|Add16~6_combout\ : std_logic; +SIGNAL \myVGA|Add16~4_combout\ : std_logic; +SIGNAL \myVGA|Add16~2_combout\ : std_logic; +SIGNAL \myVGA|Add16~0_combout\ : std_logic; +SIGNAL \myVGA|LessThan14~1_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~3_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~5_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~7_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~9_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~11_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~13_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~15_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~17_cout\ : std_logic; +SIGNAL \myVGA|LessThan14~18_combout\ : std_logic; +SIGNAL \myVGA|Add14~19\ : std_logic; +SIGNAL \myVGA|Add14~20_combout\ : std_logic; +SIGNAL \myVGA|Add15~1\ : std_logic; +SIGNAL \myVGA|Add15~3\ : std_logic; +SIGNAL \myVGA|Add15~5\ : std_logic; +SIGNAL \myVGA|Add15~7\ : std_logic; +SIGNAL \myVGA|Add15~9\ : std_logic; +SIGNAL \myVGA|Add15~11\ : std_logic; +SIGNAL \myVGA|Add15~13\ : std_logic; +SIGNAL \myVGA|Add15~15\ : std_logic; +SIGNAL \myVGA|Add15~17\ : std_logic; +SIGNAL \myVGA|Add15~18_combout\ : std_logic; +SIGNAL \myVGA|Add15~16_combout\ : std_logic; +SIGNAL \myVGA|Add15~14_combout\ : std_logic; +SIGNAL \myVGA|Add15~12_combout\ : std_logic; +SIGNAL \myVGA|Add15~10_combout\ : std_logic; +SIGNAL \myVGA|Add15~8_combout\ : std_logic; +SIGNAL \myVGA|Add15~6_combout\ : std_logic; +SIGNAL \myVGA|Add15~4_combout\ : std_logic; +SIGNAL \myVGA|Add15~2_combout\ : std_logic; +SIGNAL \myVGA|Add15~0_combout\ : std_logic; +SIGNAL \myVGA|LessThan13~1_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~3_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~5_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~7_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~9_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~11_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~13_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~15_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~17_cout\ : std_logic; +SIGNAL \myVGA|LessThan13~18_combout\ : std_logic; +SIGNAL \myVGA|Add17~1\ : std_logic; +SIGNAL \myVGA|Add17~3\ : std_logic; +SIGNAL \myVGA|Add17~5\ : std_logic; +SIGNAL \myVGA|Add17~7\ : std_logic; +SIGNAL \myVGA|Add17~9\ : std_logic; +SIGNAL \myVGA|Add17~11\ : std_logic; +SIGNAL \myVGA|Add17~13\ : std_logic; +SIGNAL \myVGA|Add17~15\ : std_logic; +SIGNAL \myVGA|Add17~17\ : std_logic; +SIGNAL \myVGA|Add17~18_combout\ : std_logic; +SIGNAL \myVGA|Add17~16_combout\ : std_logic; +SIGNAL \myVGA|Add17~14_combout\ : std_logic; +SIGNAL \myVGA|Add17~12_combout\ : std_logic; +SIGNAL \myVGA|Add17~10_combout\ : std_logic; +SIGNAL \myVGA|Add17~8_combout\ : std_logic; +SIGNAL \myVGA|Add17~6_combout\ : std_logic; +SIGNAL \myVGA|Add17~4_combout\ : std_logic; +SIGNAL \myVGA|Add17~2_combout\ : std_logic; +SIGNAL \myVGA|Add17~0_combout\ : std_logic; +SIGNAL \myVGA|LessThan15~1_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~3_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~5_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~7_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~9_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~11_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~13_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~15_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~17_cout\ : std_logic; +SIGNAL \myVGA|LessThan15~18_combout\ : std_logic; +SIGNAL \myVGA|Add15~19\ : std_logic; +SIGNAL \myVGA|Add15~20_combout\ : std_logic; +SIGNAL \myVGA|ball_draw~0_combout\ : std_logic; +SIGNAL \myVGA|ball_draw~1_combout\ : std_logic; +SIGNAL \myVGA|can_draw~0_combout\ : std_logic; +SIGNAL \myVGA|V_SYNC_GEN~0_combout\ : std_logic; +SIGNAL \myVGA|can_draw~1_combout\ : std_logic; +SIGNAL \myVGA|can_draw~q\ : std_logic; +SIGNAL \myVGA|R[1]~0_combout\ : std_logic; +SIGNAL \myVGA|ball_g[1]~7_combout\ : std_logic; +SIGNAL \myVGA|R[2]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_g[1]~8\ : std_logic; +SIGNAL \myVGA|ball_g[2]~9_combout\ : std_logic; +SIGNAL \myVGA|R[3]~2_combout\ : std_logic; +SIGNAL \myVGA|ball_g[2]~10\ : std_logic; +SIGNAL \myVGA|ball_g[3]~11_combout\ : std_logic; +SIGNAL \myVGA|R[4]~3_combout\ : std_logic; +SIGNAL \myVGA|ball_g[3]~12\ : std_logic; +SIGNAL \myVGA|ball_g[4]~13_combout\ : std_logic; +SIGNAL \myVGA|R[5]~4_combout\ : std_logic; +SIGNAL \myVGA|ball_g[4]~14\ : std_logic; +SIGNAL \myVGA|ball_g[5]~15_combout\ : std_logic; +SIGNAL \myVGA|R[6]~5_combout\ : std_logic; +SIGNAL \myVGA|ball_g[5]~16\ : std_logic; +SIGNAL \myVGA|ball_g[6]~17_combout\ : std_logic; +SIGNAL \myVGA|R[7]~6_combout\ : std_logic; +SIGNAL \myVGA|ball_g[6]~18\ : std_logic; +SIGNAL \myVGA|ball_g[7]~19_combout\ : std_logic; +SIGNAL \myVGA|G[7]~0_combout\ : std_logic; +SIGNAL \myVGA|ball_b[1]~9_cout\ : std_logic; +SIGNAL \myVGA|ball_b[1]~10_combout\ : std_logic; +SIGNAL \myVGA|B[1]~0_combout\ : std_logic; +SIGNAL \myVGA|ball_b[1]~11\ : std_logic; +SIGNAL \myVGA|ball_b[2]~12_combout\ : std_logic; +SIGNAL \myVGA|B[2]~1_combout\ : std_logic; +SIGNAL \myVGA|ball_b[2]~13\ : std_logic; +SIGNAL \myVGA|ball_b[3]~14_combout\ : std_logic; +SIGNAL \myVGA|B[3]~2_combout\ : std_logic; +SIGNAL \myVGA|ball_b[3]~15\ : std_logic; +SIGNAL \myVGA|ball_b[4]~16_combout\ : std_logic; +SIGNAL \myVGA|B[4]~3_combout\ : std_logic; +SIGNAL \myVGA|ball_b[4]~17\ : std_logic; +SIGNAL \myVGA|ball_b[5]~18_combout\ : std_logic; +SIGNAL \myVGA|B[5]~4_combout\ : std_logic; +SIGNAL \myVGA|ball_b[5]~19\ : std_logic; +SIGNAL \myVGA|ball_b[6]~20_combout\ : std_logic; +SIGNAL \myVGA|B[6]~5_combout\ : std_logic; +SIGNAL \myVGA|ball_b[6]~21\ : std_logic; +SIGNAL \myVGA|ball_b[7]~22_combout\ : std_logic; +SIGNAL \myVGA|B[7]~6_combout\ : std_logic; +SIGNAL \myVGA|H_SYNC_GEN~0_combout\ : std_logic; +SIGNAL \myVGA|H_SYNC_GEN~1_combout\ : std_logic; +SIGNAL \myVGA|HS~q\ : std_logic; +SIGNAL \myVGA|V_SYNC_GEN~1_combout\ : std_logic; +SIGNAL \myVGA|V_SYNC_GEN~2_combout\ : std_logic; +SIGNAL \myVGA|VS~q\ : std_logic; +SIGNAL \myVGA|BALL_WIDTH\ : std_logic_vector(5 DOWNTO 0); +SIGNAL \myVGA|v_px_count\ : std_logic_vector(9 DOWNTO 0); +SIGNAL \myVGA|color_mask\ : std_logic_vector(7 DOWNTO 0); +SIGNAL \myVGA|ball_g\ : std_logic_vector(7 DOWNTO 0); +SIGNAL \myPLL|altpll_component|auto_generated|wire_pll1_clk\ : std_logic_vector(4 DOWNTO 0); +SIGNAL \myVGA|ball_y\ : std_logic_vector(8 DOWNTO 0); +SIGNAL \myVGA|ball_b\ : std_logic_vector(7 DOWNTO 0); +SIGNAL \myVGA|h_px_count\ : std_logic_vector(9 DOWNTO 0); +SIGNAL \myVGA|ball_x\ : std_logic_vector(9 DOWNTO 0); +SIGNAL \myVGA|ALT_INV_VS~q\ : std_logic; +SIGNAL \myVGA|ALT_INV_HS~q\ : std_logic; + +BEGIN + +VGA_BLANK <= ww_VGA_BLANK; +VGA_SYNC <= ww_VGA_SYNC; +VGA_CLK <= ww_VGA_CLK; +ww_clk <= clk; +ww_rst <= rst; +R <= ww_R; +G <= ww_G; +B <= ww_B; +HS <= ww_HS; +VS <= ww_VS; +ww_devoe <= devoe; +ww_devclrn <= devclrn; +ww_devpor <= devpor; + +\myPLL|altpll_component|auto_generated|pll1_INCLK_bus\ <= (gnd & \clk~input_o\); + +\myPLL|altpll_component|auto_generated|wire_pll1_clk\(0) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(0); +\myPLL|altpll_component|auto_generated|wire_pll1_clk\(1) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(1); +\myPLL|altpll_component|auto_generated|wire_pll1_clk\(2) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(2); +\myPLL|altpll_component|auto_generated|wire_pll1_clk\(3) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(3); +\myPLL|altpll_component|auto_generated|wire_pll1_clk\(4) <= \myPLL|altpll_component|auto_generated|pll1_CLK_bus\(4); + +\myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \myPLL|altpll_component|auto_generated|wire_pll1_clk\(0)); +\myVGA|ALT_INV_VS~q\ <= NOT \myVGA|VS~q\; +\myVGA|ALT_INV_HS~q\ <= NOT \myVGA|HS~q\; + +-- Location: IOOBUF_X31_Y73_N9 +\VGA_BLANK~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => VCC, + devoe => ww_devoe, + o => ww_VGA_BLANK); + +-- Location: IOOBUF_X35_Y73_N16 +\VGA_SYNC~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => GND, + devoe => ww_devoe, + o => ww_VGA_SYNC); + +-- Location: IOOBUF_X47_Y73_N2 +\VGA_CLK~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + devoe => ww_devoe, + o => ww_VGA_CLK); + +-- Location: IOOBUF_X33_Y73_N2 +\R[0]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => GND, + devoe => ww_devoe, + o => ww_R(0)); + +-- Location: IOOBUF_X31_Y73_N2 +\R[1]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[1]~0_combout\, + devoe => ww_devoe, + o => ww_R(1)); + +-- Location: IOOBUF_X35_Y73_N23 +\R[2]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[2]~1_combout\, + devoe => ww_devoe, + o => ww_R(2)); + +-- Location: IOOBUF_X33_Y73_N9 +\R[3]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[3]~2_combout\, + devoe => ww_devoe, + o => ww_R(3)); + +-- Location: IOOBUF_X20_Y73_N9 +\R[4]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[4]~3_combout\, + devoe => ww_devoe, + o => ww_R(4)); + +-- Location: IOOBUF_X40_Y73_N9 +\R[5]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[5]~4_combout\, + devoe => ww_devoe, + o => ww_R(5)); + +-- Location: IOOBUF_X11_Y73_N23 +\R[6]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[6]~5_combout\, + devoe => ww_devoe, + o => ww_R(6)); + +-- Location: IOOBUF_X20_Y73_N16 +\R[7]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[7]~6_combout\, + devoe => ww_devoe, + o => ww_R(7)); + +-- Location: IOOBUF_X11_Y73_N16 +\G[0]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[1]~0_combout\, + devoe => ww_devoe, + o => ww_G(0)); + +-- Location: IOOBUF_X25_Y73_N16 +\G[1]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[2]~1_combout\, + devoe => ww_devoe, + o => ww_G(1)); + +-- Location: IOOBUF_X11_Y73_N9 +\G[2]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[3]~2_combout\, + devoe => ww_devoe, + o => ww_G(2)); + +-- Location: IOOBUF_X25_Y73_N23 +\G[3]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[4]~3_combout\, + devoe => ww_devoe, + o => ww_G(3)); + +-- Location: IOOBUF_X16_Y73_N9 +\G[4]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[5]~4_combout\, + devoe => ww_devoe, + o => ww_G(4)); + +-- Location: IOOBUF_X16_Y73_N2 +\G[5]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[6]~5_combout\, + devoe => ww_devoe, + o => ww_G(5)); + +-- Location: IOOBUF_X20_Y73_N2 +\G[6]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[7]~6_combout\, + devoe => ww_devoe, + o => ww_G(6)); + +-- Location: IOOBUF_X23_Y73_N16 +\G[7]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|G[7]~0_combout\, + devoe => ww_devoe, + o => ww_G(7)); + +-- Location: IOOBUF_X38_Y73_N9 +\B[0]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|R[1]~0_combout\, + devoe => ww_devoe, + o => ww_B(0)); + +-- Location: IOOBUF_X38_Y73_N2 +\B[1]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|B[1]~0_combout\, + devoe => ww_devoe, + o => ww_B(1)); + +-- Location: IOOBUF_X23_Y73_N2 +\B[2]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|B[2]~1_combout\, + devoe => ww_devoe, + o => ww_B(2)); + +-- Location: IOOBUF_X42_Y73_N9 +\B[3]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|B[3]~2_combout\, + devoe => ww_devoe, + o => ww_B(3)); + +-- Location: IOOBUF_X42_Y73_N2 +\B[4]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|B[4]~3_combout\, + devoe => ww_devoe, + o => ww_B(4)); + +-- Location: IOOBUF_X52_Y73_N16 +\B[5]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|B[5]~4_combout\, + devoe => ww_devoe, + o => ww_B(5)); + +-- Location: IOOBUF_X23_Y73_N9 +\B[6]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|B[6]~5_combout\, + devoe => ww_devoe, + o => ww_B(6)); + +-- Location: IOOBUF_X52_Y73_N23 +\B[7]~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|B[7]~6_combout\, + devoe => ww_devoe, + o => ww_B(7)); + +-- Location: IOOBUF_X38_Y73_N16 +\HS~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|ALT_INV_HS~q\, + devoe => ww_devoe, + o => ww_HS); + +-- Location: IOOBUF_X54_Y73_N2 +\VS~output\ : cycloneive_io_obuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + open_drain_output => "false") +-- pragma translate_on +PORT MAP ( + i => \myVGA|ALT_INV_VS~q\, + devoe => ww_devoe, + o => ww_VS); + +-- Location: IOIBUF_X58_Y0_N22 +\clk~input\ : cycloneive_io_ibuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + simulate_z_as => "z") +-- pragma translate_on +PORT MAP ( + i => ww_clk, + o => \clk~input_o\); + +-- Location: PLL_4 +\myPLL|altpll_component|auto_generated|pll1\ : cycloneive_pll +-- pragma translate_off +GENERIC MAP ( + auto_settings => "false", + bandwidth_type => "medium", + c0_high => 11, + c0_initial => 1, + c0_low => 10, + c0_mode => "odd", + c0_ph => 0, + c1_high => 0, + c1_initial => 0, + c1_low => 0, + c1_mode => "bypass", + c1_ph => 0, + c1_use_casc_in => "off", + c2_high => 0, + c2_initial => 0, + c2_low => 0, + c2_mode => "bypass", + c2_ph => 0, + c2_use_casc_in => "off", + c3_high => 0, + c3_initial => 0, + c3_low => 0, + c3_mode => "bypass", + c3_ph => 0, + c3_use_casc_in => "off", + c4_high => 0, + c4_initial => 0, + c4_low => 0, + c4_mode => "bypass", + c4_ph => 0, + c4_use_casc_in => "off", + charge_pump_current_bits => 1, + clk0_counter => "c0", + clk0_divide_by => 147, + clk0_duty_cycle => 50, + clk0_multiply_by => 74, + clk0_phase_shift => "0", + clk1_counter => "unused", + clk1_divide_by => 0, + clk1_duty_cycle => 50, + clk1_multiply_by => 0, + clk1_phase_shift => "0", + clk2_counter => "unused", + clk2_divide_by => 0, + clk2_duty_cycle => 50, + clk2_multiply_by => 0, + clk2_phase_shift => "0", + clk3_counter => "unused", + clk3_divide_by => 0, + clk3_duty_cycle => 50, + clk3_multiply_by => 0, + clk3_phase_shift => "0", + clk4_counter => "unused", + clk4_divide_by => 0, + clk4_duty_cycle => 50, + clk4_multiply_by => 0, + clk4_phase_shift => "0", + compensate_clock => "clock0", + inclk0_input_frequency => 20000, + inclk1_input_frequency => 0, + loop_filter_c_bits => 0, + loop_filter_r_bits => 16, + m => 74, + m_initial => 1, + m_ph => 0, + n => 7, + operation_mode => "normal", + pfd_max => 200000, + pfd_min => 3076, + self_reset_on_loss_lock => "off", + simulation_type => "functional", + switch_over_type => "auto", + vco_center => 1538, + vco_divide_by => 0, + vco_frequency_control => "auto", + vco_max => 3333, + vco_min => 1538, + vco_multiply_by => 0, + vco_phase_shift_step => 236, + vco_post_scale => 2) +-- pragma translate_on +PORT MAP ( + fbin => \myPLL|altpll_component|auto_generated|wire_pll1_fbout\, + inclk => \myPLL|altpll_component|auto_generated|pll1_INCLK_bus\, + fbout => \myPLL|altpll_component|auto_generated|wire_pll1_fbout\, + clk => \myPLL|altpll_component|auto_generated|pll1_CLK_bus\); + +-- Location: CLKCTRL_G18 +\myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl\ : cycloneive_clkctrl +-- pragma translate_off +GENERIC MAP ( + clock_type => "global clock", + ena_register_mode => "none") +-- pragma translate_on +PORT MAP ( + inclk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_INCLK_bus\, + devclrn => ww_devclrn, + devpor => ww_devpor, + outclk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\); + +-- Location: LCCOMB_X34_Y67_N8 +\myVGA|h_px_count[0]~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[0]~10_combout\ = \myVGA|h_px_count\(0) $ (VCC) +-- \myVGA|h_px_count[0]~11\ = CARRY(\myVGA|h_px_count\(0)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011001111001100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|h_px_count\(0), + datad => VCC, + combout => \myVGA|h_px_count[0]~10_combout\, + cout => \myVGA|h_px_count[0]~11\); + +-- Location: IOIBUF_X115_Y35_N22 +\rst~input\ : cycloneive_io_ibuf +-- pragma translate_off +GENERIC MAP ( + bus_hold => "false", + simulate_z_as => "z") +-- pragma translate_on +PORT MAP ( + i => ww_rst, + o => \rst~input_o\); + +-- Location: LCCOMB_X33_Y67_N24 +\myVGA|LessThan0~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan0~0_combout\ = ((!\myVGA|h_px_count\(5) & (!\myVGA|h_px_count\(6) & !\myVGA|h_px_count\(7)))) # (!\myVGA|h_px_count\(8)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011001100110111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(5), + datab => \myVGA|h_px_count\(8), + datac => \myVGA|h_px_count\(6), + datad => \myVGA|h_px_count\(7), + combout => \myVGA|LessThan0~0_combout\); + +-- Location: LCCOMB_X34_Y67_N30 +\myVGA|LessThan0~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan0~1_combout\ = (\myVGA|h_px_count\(9) & !\myVGA|LessThan0~0_combout\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000011110000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datac => \myVGA|h_px_count\(9), + datad => \myVGA|LessThan0~0_combout\, + combout => \myVGA|LessThan0~1_combout\); + +-- Location: FF_X34_Y67_N9 +\myVGA|h_px_count[0]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[0]~10_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(0)); + +-- Location: LCCOMB_X34_Y67_N10 +\myVGA|h_px_count[1]~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[1]~12_combout\ = (\myVGA|h_px_count\(1) & (!\myVGA|h_px_count[0]~11\)) # (!\myVGA|h_px_count\(1) & ((\myVGA|h_px_count[0]~11\) # (GND))) +-- \myVGA|h_px_count[1]~13\ = CARRY((!\myVGA|h_px_count[0]~11\) # (!\myVGA|h_px_count\(1))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(1), + datad => VCC, + cin => \myVGA|h_px_count[0]~11\, + combout => \myVGA|h_px_count[1]~12_combout\, + cout => \myVGA|h_px_count[1]~13\); + +-- Location: FF_X34_Y67_N11 +\myVGA|h_px_count[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[1]~12_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(1)); + +-- Location: LCCOMB_X34_Y67_N12 +\myVGA|h_px_count[2]~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[2]~14_combout\ = (\myVGA|h_px_count\(2) & (\myVGA|h_px_count[1]~13\ $ (GND))) # (!\myVGA|h_px_count\(2) & (!\myVGA|h_px_count[1]~13\ & VCC)) +-- \myVGA|h_px_count[2]~15\ = CARRY((\myVGA|h_px_count\(2) & !\myVGA|h_px_count[1]~13\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(2), + datad => VCC, + cin => \myVGA|h_px_count[1]~13\, + combout => \myVGA|h_px_count[2]~14_combout\, + cout => \myVGA|h_px_count[2]~15\); + +-- Location: FF_X34_Y67_N13 +\myVGA|h_px_count[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[2]~14_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(2)); + +-- Location: LCCOMB_X34_Y67_N14 +\myVGA|h_px_count[3]~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[3]~16_combout\ = (\myVGA|h_px_count\(3) & (!\myVGA|h_px_count[2]~15\)) # (!\myVGA|h_px_count\(3) & ((\myVGA|h_px_count[2]~15\) # (GND))) +-- \myVGA|h_px_count[3]~17\ = CARRY((!\myVGA|h_px_count[2]~15\) # (!\myVGA|h_px_count\(3))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|h_px_count\(3), + datad => VCC, + cin => \myVGA|h_px_count[2]~15\, + combout => \myVGA|h_px_count[3]~16_combout\, + cout => \myVGA|h_px_count[3]~17\); + +-- Location: FF_X34_Y67_N15 +\myVGA|h_px_count[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[3]~16_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(3)); + +-- Location: LCCOMB_X34_Y67_N16 +\myVGA|h_px_count[4]~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[4]~18_combout\ = (\myVGA|h_px_count\(4) & (\myVGA|h_px_count[3]~17\ $ (GND))) # (!\myVGA|h_px_count\(4) & (!\myVGA|h_px_count[3]~17\ & VCC)) +-- \myVGA|h_px_count[4]~19\ = CARRY((\myVGA|h_px_count\(4) & !\myVGA|h_px_count[3]~17\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(4), + datad => VCC, + cin => \myVGA|h_px_count[3]~17\, + combout => \myVGA|h_px_count[4]~18_combout\, + cout => \myVGA|h_px_count[4]~19\); + +-- Location: FF_X34_Y67_N17 +\myVGA|h_px_count[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[4]~18_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(4)); + +-- Location: LCCOMB_X34_Y67_N18 +\myVGA|h_px_count[5]~20\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[5]~20_combout\ = (\myVGA|h_px_count\(5) & (!\myVGA|h_px_count[4]~19\)) # (!\myVGA|h_px_count\(5) & ((\myVGA|h_px_count[4]~19\) # (GND))) +-- \myVGA|h_px_count[5]~21\ = CARRY((!\myVGA|h_px_count[4]~19\) # (!\myVGA|h_px_count\(5))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(5), + datad => VCC, + cin => \myVGA|h_px_count[4]~19\, + combout => \myVGA|h_px_count[5]~20_combout\, + cout => \myVGA|h_px_count[5]~21\); + +-- Location: FF_X34_Y67_N19 +\myVGA|h_px_count[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[5]~20_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(5)); + +-- Location: LCCOMB_X34_Y67_N20 +\myVGA|h_px_count[6]~22\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[6]~22_combout\ = (\myVGA|h_px_count\(6) & (\myVGA|h_px_count[5]~21\ $ (GND))) # (!\myVGA|h_px_count\(6) & (!\myVGA|h_px_count[5]~21\ & VCC)) +-- \myVGA|h_px_count[6]~23\ = CARRY((\myVGA|h_px_count\(6) & !\myVGA|h_px_count[5]~21\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|h_px_count\(6), + datad => VCC, + cin => \myVGA|h_px_count[5]~21\, + combout => \myVGA|h_px_count[6]~22_combout\, + cout => \myVGA|h_px_count[6]~23\); + +-- Location: FF_X34_Y67_N21 +\myVGA|h_px_count[6]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[6]~22_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(6)); + +-- Location: LCCOMB_X34_Y67_N22 +\myVGA|h_px_count[7]~24\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[7]~24_combout\ = (\myVGA|h_px_count\(7) & (!\myVGA|h_px_count[6]~23\)) # (!\myVGA|h_px_count\(7) & ((\myVGA|h_px_count[6]~23\) # (GND))) +-- \myVGA|h_px_count[7]~25\ = CARRY((!\myVGA|h_px_count[6]~23\) # (!\myVGA|h_px_count\(7))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(7), + datad => VCC, + cin => \myVGA|h_px_count[6]~23\, + combout => \myVGA|h_px_count[7]~24_combout\, + cout => \myVGA|h_px_count[7]~25\); + +-- Location: FF_X34_Y67_N23 +\myVGA|h_px_count[7]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[7]~24_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(7)); + +-- Location: LCCOMB_X34_Y67_N24 +\myVGA|h_px_count[8]~26\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[8]~26_combout\ = (\myVGA|h_px_count\(8) & (\myVGA|h_px_count[7]~25\ $ (GND))) # (!\myVGA|h_px_count\(8) & (!\myVGA|h_px_count[7]~25\ & VCC)) +-- \myVGA|h_px_count[8]~27\ = CARRY((\myVGA|h_px_count\(8) & !\myVGA|h_px_count[7]~25\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|h_px_count\(8), + datad => VCC, + cin => \myVGA|h_px_count[7]~25\, + combout => \myVGA|h_px_count[8]~26_combout\, + cout => \myVGA|h_px_count[8]~27\); + +-- Location: FF_X34_Y67_N25 +\myVGA|h_px_count[8]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[8]~26_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(8)); + +-- Location: LCCOMB_X34_Y67_N26 +\myVGA|h_px_count[9]~28\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|h_px_count[9]~28_combout\ = \myVGA|h_px_count\(9) $ (\myVGA|h_px_count[8]~27\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(9), + cin => \myVGA|h_px_count[8]~27\, + combout => \myVGA|h_px_count[9]~28_combout\); + +-- Location: FF_X34_Y67_N27 +\myVGA|h_px_count[9]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|h_px_count[9]~28_combout\, + clrn => \rst~input_o\, + sclr => \myVGA|LessThan0~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|h_px_count\(9)); + +-- Location: LCCOMB_X31_Y68_N2 +\myVGA|ball_bounce:ball_speed_x[1]~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:ball_speed_x[1]~0_combout\ = !\myVGA|ball_speed_x~0_combout\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111100001111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datac => \myVGA|ball_speed_x~0_combout\, + combout => \myVGA|ball_bounce:ball_speed_x[1]~0_combout\); + +-- Location: LCCOMB_X35_Y67_N10 +\myVGA|Add1~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~0_combout\ = \myVGA|v_px_count\(0) $ (VCC) +-- \myVGA|Add1~1\ = CARRY(\myVGA|v_px_count\(0)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101010110101010", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(0), + datad => VCC, + combout => \myVGA|Add1~0_combout\, + cout => \myVGA|Add1~1\); + +-- Location: LCCOMB_X34_Y67_N6 +\myVGA|v_px_count[9]~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|v_px_count[9]~0_combout\ = (\rst~input_o\ & ((\myVGA|Equal0~2_combout\) # ((!\myVGA|LessThan0~0_combout\ & \myVGA|h_px_count\(9))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1011101000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Equal0~2_combout\, + datab => \myVGA|LessThan0~0_combout\, + datac => \myVGA|h_px_count\(9), + datad => \rst~input_o\, + combout => \myVGA|v_px_count[9]~0_combout\); + +-- Location: FF_X35_Y67_N11 +\myVGA|v_px_count[0]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add1~0_combout\, + ena => \myVGA|v_px_count[9]~0_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(0)); + +-- Location: LCCOMB_X35_Y67_N12 +\myVGA|Add1~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~2_combout\ = (\myVGA|v_px_count\(1) & (!\myVGA|Add1~1\)) # (!\myVGA|v_px_count\(1) & ((\myVGA|Add1~1\) # (GND))) +-- \myVGA|Add1~3\ = CARRY((!\myVGA|Add1~1\) # (!\myVGA|v_px_count\(1))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(1), + datad => VCC, + cin => \myVGA|Add1~1\, + combout => \myVGA|Add1~2_combout\, + cout => \myVGA|Add1~3\); + +-- Location: LCCOMB_X35_Y67_N14 +\myVGA|Add1~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~4_combout\ = (\myVGA|v_px_count\(2) & (\myVGA|Add1~3\ $ (GND))) # (!\myVGA|v_px_count\(2) & (!\myVGA|Add1~3\ & VCC)) +-- \myVGA|Add1~5\ = CARRY((\myVGA|v_px_count\(2) & !\myVGA|Add1~3\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(2), + datad => VCC, + cin => \myVGA|Add1~3\, + combout => \myVGA|Add1~4_combout\, + cout => \myVGA|Add1~5\); + +-- Location: LCCOMB_X35_Y67_N2 +\myVGA|v_px_count[2]~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|v_px_count[2]~3_combout\ = (\myVGA|v_px_count[1]~1_combout\ & ((\myVGA|Add1~4_combout\) # ((!\myVGA|v_px_count[9]~0_combout\ & \myVGA|v_px_count\(2))))) # (!\myVGA|v_px_count[1]~1_combout\ & (!\myVGA|v_px_count[9]~0_combout\ & +-- (\myVGA|v_px_count\(2)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1011101000110000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count[1]~1_combout\, + datab => \myVGA|v_px_count[9]~0_combout\, + datac => \myVGA|v_px_count\(2), + datad => \myVGA|Add1~4_combout\, + combout => \myVGA|v_px_count[2]~3_combout\); + +-- Location: FF_X35_Y67_N3 +\myVGA|v_px_count[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|v_px_count[2]~3_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(2)); + +-- Location: LCCOMB_X35_Y67_N16 +\myVGA|Add1~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~6_combout\ = (\myVGA|v_px_count\(3) & (!\myVGA|Add1~5\)) # (!\myVGA|v_px_count\(3) & ((\myVGA|Add1~5\) # (GND))) +-- \myVGA|Add1~7\ = CARRY((!\myVGA|Add1~5\) # (!\myVGA|v_px_count\(3))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|v_px_count\(3), + datad => VCC, + cin => \myVGA|Add1~5\, + combout => \myVGA|Add1~6_combout\, + cout => \myVGA|Add1~7\); + +-- Location: LCCOMB_X35_Y67_N4 +\myVGA|v_px_count[3]~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|v_px_count[3]~4_combout\ = (\myVGA|v_px_count[1]~1_combout\ & ((\myVGA|Add1~6_combout\) # ((!\myVGA|v_px_count[9]~0_combout\ & \myVGA|v_px_count\(3))))) # (!\myVGA|v_px_count[1]~1_combout\ & (!\myVGA|v_px_count[9]~0_combout\ & +-- (\myVGA|v_px_count\(3)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1011101000110000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count[1]~1_combout\, + datab => \myVGA|v_px_count[9]~0_combout\, + datac => \myVGA|v_px_count\(3), + datad => \myVGA|Add1~6_combout\, + combout => \myVGA|v_px_count[3]~4_combout\); + +-- Location: FF_X35_Y67_N5 +\myVGA|v_px_count[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|v_px_count[3]~4_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(3)); + +-- Location: LCCOMB_X35_Y67_N18 +\myVGA|Add1~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~8_combout\ = (\myVGA|v_px_count\(4) & (\myVGA|Add1~7\ $ (GND))) # (!\myVGA|v_px_count\(4) & (!\myVGA|Add1~7\ & VCC)) +-- \myVGA|Add1~9\ = CARRY((\myVGA|v_px_count\(4) & !\myVGA|Add1~7\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|v_px_count\(4), + datad => VCC, + cin => \myVGA|Add1~7\, + combout => \myVGA|Add1~8_combout\, + cout => \myVGA|Add1~9\); + +-- Location: FF_X35_Y67_N19 +\myVGA|v_px_count[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add1~8_combout\, + ena => \myVGA|v_px_count[9]~0_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(4)); + +-- Location: LCCOMB_X35_Y67_N20 +\myVGA|Add1~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~10_combout\ = (\myVGA|v_px_count\(5) & (!\myVGA|Add1~9\)) # (!\myVGA|v_px_count\(5) & ((\myVGA|Add1~9\) # (GND))) +-- \myVGA|Add1~11\ = CARRY((!\myVGA|Add1~9\) # (!\myVGA|v_px_count\(5))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|v_px_count\(5), + datad => VCC, + cin => \myVGA|Add1~9\, + combout => \myVGA|Add1~10_combout\, + cout => \myVGA|Add1~11\); + +-- Location: FF_X35_Y67_N21 +\myVGA|v_px_count[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add1~10_combout\, + ena => \myVGA|v_px_count[9]~0_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(5)); + +-- Location: LCCOMB_X35_Y67_N22 +\myVGA|Add1~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~12_combout\ = (\myVGA|v_px_count\(6) & (\myVGA|Add1~11\ $ (GND))) # (!\myVGA|v_px_count\(6) & (!\myVGA|Add1~11\ & VCC)) +-- \myVGA|Add1~13\ = CARRY((\myVGA|v_px_count\(6) & !\myVGA|Add1~11\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(6), + datad => VCC, + cin => \myVGA|Add1~11\, + combout => \myVGA|Add1~12_combout\, + cout => \myVGA|Add1~13\); + +-- Location: FF_X35_Y67_N23 +\myVGA|v_px_count[6]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add1~12_combout\, + ena => \myVGA|v_px_count[9]~0_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(6)); + +-- Location: LCCOMB_X35_Y67_N24 +\myVGA|Add1~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~14_combout\ = (\myVGA|v_px_count\(7) & (!\myVGA|Add1~13\)) # (!\myVGA|v_px_count\(7) & ((\myVGA|Add1~13\) # (GND))) +-- \myVGA|Add1~15\ = CARRY((!\myVGA|Add1~13\) # (!\myVGA|v_px_count\(7))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|v_px_count\(7), + datad => VCC, + cin => \myVGA|Add1~13\, + combout => \myVGA|Add1~14_combout\, + cout => \myVGA|Add1~15\); + +-- Location: FF_X35_Y67_N25 +\myVGA|v_px_count[7]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add1~14_combout\, + ena => \myVGA|v_px_count[9]~0_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(7)); + +-- Location: LCCOMB_X35_Y67_N26 +\myVGA|Add1~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~16_combout\ = (\myVGA|v_px_count\(8) & (\myVGA|Add1~15\ $ (GND))) # (!\myVGA|v_px_count\(8) & (!\myVGA|Add1~15\ & VCC)) +-- \myVGA|Add1~17\ = CARRY((\myVGA|v_px_count\(8) & !\myVGA|Add1~15\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(8), + datad => VCC, + cin => \myVGA|Add1~15\, + combout => \myVGA|Add1~16_combout\, + cout => \myVGA|Add1~17\); + +-- Location: FF_X35_Y67_N27 +\myVGA|v_px_count[8]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add1~16_combout\, + ena => \myVGA|v_px_count[9]~0_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(8)); + +-- Location: LCCOMB_X35_Y67_N28 +\myVGA|Add1~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add1~18_combout\ = \myVGA|Add1~17\ $ (\myVGA|v_px_count\(9)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111111110000", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datad => \myVGA|v_px_count\(9), + cin => \myVGA|Add1~17\, + combout => \myVGA|Add1~18_combout\); + +-- Location: LCCOMB_X35_Y67_N0 +\myVGA|v_px_count[9]~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|v_px_count[9]~2_combout\ = (\myVGA|v_px_count[1]~1_combout\ & ((\myVGA|Add1~18_combout\) # ((!\myVGA|v_px_count[9]~0_combout\ & \myVGA|v_px_count\(9))))) # (!\myVGA|v_px_count[1]~1_combout\ & (!\myVGA|v_px_count[9]~0_combout\ & +-- (\myVGA|v_px_count\(9)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1011101000110000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count[1]~1_combout\, + datab => \myVGA|v_px_count[9]~0_combout\, + datac => \myVGA|v_px_count\(9), + datad => \myVGA|Add1~18_combout\, + combout => \myVGA|v_px_count[9]~2_combout\); + +-- Location: FF_X35_Y67_N1 +\myVGA|v_px_count[9]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|v_px_count[9]~2_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(9)); + +-- Location: LCCOMB_X31_Y67_N6 +\myVGA|Equal0~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Equal0~1_combout\ = (\myVGA|v_px_count\(0) & (\myVGA|v_px_count\(9) & (\myVGA|v_px_count\(2) & \myVGA|v_px_count\(3)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(0), + datab => \myVGA|v_px_count\(9), + datac => \myVGA|v_px_count\(2), + datad => \myVGA|v_px_count\(3), + combout => \myVGA|Equal0~1_combout\); + +-- Location: LCCOMB_X31_Y67_N8 +\myVGA|Equal0~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Equal0~0_combout\ = (!\myVGA|v_px_count\(6) & (!\myVGA|v_px_count\(8) & (!\myVGA|v_px_count\(7) & !\myVGA|v_px_count\(5)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000000001", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(6), + datab => \myVGA|v_px_count\(8), + datac => \myVGA|v_px_count\(7), + datad => \myVGA|v_px_count\(5), + combout => \myVGA|Equal0~0_combout\); + +-- Location: LCCOMB_X31_Y67_N0 +\myVGA|Equal0~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Equal0~2_combout\ = (\myVGA|Equal0~1_combout\ & (!\myVGA|v_px_count\(4) & (\myVGA|Equal0~0_combout\ & !\myVGA|v_px_count\(1)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000100000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Equal0~1_combout\, + datab => \myVGA|v_px_count\(4), + datac => \myVGA|Equal0~0_combout\, + datad => \myVGA|v_px_count\(1), + combout => \myVGA|Equal0~2_combout\); + +-- Location: LCCOMB_X34_Y67_N4 +\myVGA|v_px_count[1]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|v_px_count[1]~1_combout\ = (!\myVGA|Equal0~2_combout\ & (!\myVGA|LessThan0~0_combout\ & (\myVGA|h_px_count\(9) & \rst~input_o\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0001000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Equal0~2_combout\, + datab => \myVGA|LessThan0~0_combout\, + datac => \myVGA|h_px_count\(9), + datad => \rst~input_o\, + combout => \myVGA|v_px_count[1]~1_combout\); + +-- Location: LCCOMB_X35_Y67_N6 +\myVGA|v_px_count[1]~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|v_px_count[1]~5_combout\ = (\myVGA|v_px_count[1]~1_combout\ & ((\myVGA|Add1~2_combout\) # ((!\myVGA|v_px_count[9]~0_combout\ & \myVGA|v_px_count\(1))))) # (!\myVGA|v_px_count[1]~1_combout\ & (!\myVGA|v_px_count[9]~0_combout\ & +-- (\myVGA|v_px_count\(1)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1011101000110000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count[1]~1_combout\, + datab => \myVGA|v_px_count[9]~0_combout\, + datac => \myVGA|v_px_count\(1), + datad => \myVGA|Add1~2_combout\, + combout => \myVGA|v_px_count[1]~5_combout\); + +-- Location: FF_X35_Y67_N7 +\myVGA|v_px_count[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|v_px_count[1]~5_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|v_px_count\(1)); + +-- Location: LCCOMB_X31_Y67_N2 +\myVGA|Equal1~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Equal1~0_combout\ = (!\myVGA|v_px_count\(0) & (!\myVGA|v_px_count\(9) & (!\myVGA|v_px_count\(2) & !\myVGA|v_px_count\(3)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000000001", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(0), + datab => \myVGA|v_px_count\(9), + datac => \myVGA|v_px_count\(2), + datad => \myVGA|v_px_count\(3), + combout => \myVGA|Equal1~0_combout\); + +-- Location: LCCOMB_X31_Y67_N4 +\myVGA|Equal1~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Equal1~1_combout\ = (!\myVGA|v_px_count\(1) & (\myVGA|Equal1~0_combout\ & (\myVGA|Equal0~0_combout\ & !\myVGA|v_px_count\(4)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(1), + datab => \myVGA|Equal1~0_combout\, + datac => \myVGA|Equal0~0_combout\, + datad => \myVGA|v_px_count\(4), + combout => \myVGA|Equal1~1_combout\); + +-- Location: LCCOMB_X31_Y69_N6 +\myVGA|ball_bounce:count[0]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[0]~1_combout\ = \myVGA|ball_bounce:count[0]~q\ $ (VCC) +-- \myVGA|ball_bounce:count[0]~2\ = CARRY(\myVGA|ball_bounce:count[0]~q\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101010110101010", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_bounce:count[0]~q\, + datad => VCC, + combout => \myVGA|ball_bounce:count[0]~1_combout\, + cout => \myVGA|ball_bounce:count[0]~2\); + +-- Location: FF_X31_Y69_N7 +\myVGA|ball_bounce:count[0]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[0]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[0]~q\); + +-- Location: LCCOMB_X31_Y69_N8 +\myVGA|ball_bounce:count[1]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[1]~1_combout\ = (\myVGA|ball_bounce:count[1]~q\ & (!\myVGA|ball_bounce:count[0]~2\)) # (!\myVGA|ball_bounce:count[1]~q\ & ((\myVGA|ball_bounce:count[0]~2\) # (GND))) +-- \myVGA|ball_bounce:count[1]~2\ = CARRY((!\myVGA|ball_bounce:count[0]~2\) # (!\myVGA|ball_bounce:count[1]~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_bounce:count[1]~q\, + datad => VCC, + cin => \myVGA|ball_bounce:count[0]~2\, + combout => \myVGA|ball_bounce:count[1]~1_combout\, + cout => \myVGA|ball_bounce:count[1]~2\); + +-- Location: FF_X31_Y69_N9 +\myVGA|ball_bounce:count[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[1]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[1]~q\); + +-- Location: LCCOMB_X31_Y69_N10 +\myVGA|ball_bounce:count[2]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[2]~1_combout\ = (\myVGA|ball_bounce:count[2]~q\ & (\myVGA|ball_bounce:count[1]~2\ $ (GND))) # (!\myVGA|ball_bounce:count[2]~q\ & (!\myVGA|ball_bounce:count[1]~2\ & VCC)) +-- \myVGA|ball_bounce:count[2]~2\ = CARRY((\myVGA|ball_bounce:count[2]~q\ & !\myVGA|ball_bounce:count[1]~2\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_bounce:count[2]~q\, + datad => VCC, + cin => \myVGA|ball_bounce:count[1]~2\, + combout => \myVGA|ball_bounce:count[2]~1_combout\, + cout => \myVGA|ball_bounce:count[2]~2\); + +-- Location: FF_X31_Y69_N11 +\myVGA|ball_bounce:count[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[2]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[2]~q\); + +-- Location: LCCOMB_X31_Y69_N12 +\myVGA|ball_bounce:count[3]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[3]~1_combout\ = (\myVGA|ball_bounce:count[3]~q\ & (!\myVGA|ball_bounce:count[2]~2\)) # (!\myVGA|ball_bounce:count[3]~q\ & ((\myVGA|ball_bounce:count[2]~2\) # (GND))) +-- \myVGA|ball_bounce:count[3]~2\ = CARRY((!\myVGA|ball_bounce:count[2]~2\) # (!\myVGA|ball_bounce:count[3]~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_bounce:count[3]~q\, + datad => VCC, + cin => \myVGA|ball_bounce:count[2]~2\, + combout => \myVGA|ball_bounce:count[3]~1_combout\, + cout => \myVGA|ball_bounce:count[3]~2\); + +-- Location: FF_X31_Y69_N13 +\myVGA|ball_bounce:count[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[3]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[3]~q\); + +-- Location: LCCOMB_X31_Y69_N14 +\myVGA|ball_bounce:count[4]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[4]~1_combout\ = (\myVGA|ball_bounce:count[4]~q\ & (\myVGA|ball_bounce:count[3]~2\ $ (GND))) # (!\myVGA|ball_bounce:count[4]~q\ & (!\myVGA|ball_bounce:count[3]~2\ & VCC)) +-- \myVGA|ball_bounce:count[4]~2\ = CARRY((\myVGA|ball_bounce:count[4]~q\ & !\myVGA|ball_bounce:count[3]~2\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_bounce:count[4]~q\, + datad => VCC, + cin => \myVGA|ball_bounce:count[3]~2\, + combout => \myVGA|ball_bounce:count[4]~1_combout\, + cout => \myVGA|ball_bounce:count[4]~2\); + +-- Location: FF_X31_Y69_N15 +\myVGA|ball_bounce:count[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[4]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[4]~q\); + +-- Location: LCCOMB_X31_Y69_N16 +\myVGA|ball_bounce:count[5]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[5]~1_combout\ = (\myVGA|ball_bounce:count[5]~q\ & (!\myVGA|ball_bounce:count[4]~2\)) # (!\myVGA|ball_bounce:count[5]~q\ & ((\myVGA|ball_bounce:count[4]~2\) # (GND))) +-- \myVGA|ball_bounce:count[5]~2\ = CARRY((!\myVGA|ball_bounce:count[4]~2\) # (!\myVGA|ball_bounce:count[5]~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_bounce:count[5]~q\, + datad => VCC, + cin => \myVGA|ball_bounce:count[4]~2\, + combout => \myVGA|ball_bounce:count[5]~1_combout\, + cout => \myVGA|ball_bounce:count[5]~2\); + +-- Location: FF_X31_Y69_N17 +\myVGA|ball_bounce:count[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[5]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[5]~q\); + +-- Location: LCCOMB_X31_Y69_N18 +\myVGA|ball_bounce:count[6]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[6]~1_combout\ = (\myVGA|ball_bounce:count[6]~q\ & (\myVGA|ball_bounce:count[5]~2\ $ (GND))) # (!\myVGA|ball_bounce:count[6]~q\ & (!\myVGA|ball_bounce:count[5]~2\ & VCC)) +-- \myVGA|ball_bounce:count[6]~2\ = CARRY((\myVGA|ball_bounce:count[6]~q\ & !\myVGA|ball_bounce:count[5]~2\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_bounce:count[6]~q\, + datad => VCC, + cin => \myVGA|ball_bounce:count[5]~2\, + combout => \myVGA|ball_bounce:count[6]~1_combout\, + cout => \myVGA|ball_bounce:count[6]~2\); + +-- Location: FF_X31_Y69_N19 +\myVGA|ball_bounce:count[6]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[6]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[6]~q\); + +-- Location: LCCOMB_X31_Y69_N24 +\myVGA|LessThan7~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan7~0_combout\ = ((!\myVGA|ball_bounce:count[4]~q\ & ((!\myVGA|ball_bounce:count[2]~q\) # (!\myVGA|ball_bounce:count[3]~q\)))) # (!\myVGA|ball_bounce:count[5]~q\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011011100111111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_bounce:count[3]~q\, + datab => \myVGA|ball_bounce:count[5]~q\, + datac => \myVGA|ball_bounce:count[4]~q\, + datad => \myVGA|ball_bounce:count[2]~q\, + combout => \myVGA|LessThan7~0_combout\); + +-- Location: LCCOMB_X31_Y69_N20 +\myVGA|ball_bounce:count[7]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[7]~1_combout\ = (\myVGA|ball_bounce:count[7]~q\ & (!\myVGA|ball_bounce:count[6]~2\)) # (!\myVGA|ball_bounce:count[7]~q\ & ((\myVGA|ball_bounce:count[6]~2\) # (GND))) +-- \myVGA|ball_bounce:count[7]~2\ = CARRY((!\myVGA|ball_bounce:count[6]~2\) # (!\myVGA|ball_bounce:count[7]~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_bounce:count[7]~q\, + datad => VCC, + cin => \myVGA|ball_bounce:count[6]~2\, + combout => \myVGA|ball_bounce:count[7]~1_combout\, + cout => \myVGA|ball_bounce:count[7]~2\); + +-- Location: FF_X31_Y69_N21 +\myVGA|ball_bounce:count[7]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[7]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[7]~q\); + +-- Location: LCCOMB_X31_Y69_N22 +\myVGA|ball_bounce:count[8]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:count[8]~1_combout\ = \myVGA|ball_bounce:count[8]~q\ $ (!\myVGA|ball_bounce:count[7]~2\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010110100101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_bounce:count[8]~q\, + cin => \myVGA|ball_bounce:count[7]~2\, + combout => \myVGA|ball_bounce:count[8]~1_combout\); + +-- Location: FF_X31_Y69_N23 +\myVGA|ball_bounce:count[8]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:count[8]~1_combout\, + sclr => \myVGA|LessThan7~1_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:count[8]~q\); + +-- Location: LCCOMB_X31_Y69_N2 +\myVGA|LessThan7~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan7~1_combout\ = (\myVGA|ball_bounce:count[8]~q\ & ((\myVGA|ball_bounce:count[6]~q\) # ((\myVGA|ball_bounce:count[7]~q\) # (!\myVGA|LessThan7~0_combout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111000010110000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_bounce:count[6]~q\, + datab => \myVGA|LessThan7~0_combout\, + datac => \myVGA|ball_bounce:count[8]~q\, + datad => \myVGA|ball_bounce:count[7]~q\, + combout => \myVGA|LessThan7~1_combout\); + +-- Location: LCCOMB_X31_Y69_N4 +\myVGA|ball_b[0]~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[0]~7_combout\ = (\myVGA|Equal1~1_combout\ & \myVGA|LessThan7~1_combout\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datac => \myVGA|Equal1~1_combout\, + datad => \myVGA|LessThan7~1_combout\, + combout => \myVGA|ball_b[0]~7_combout\); + +-- Location: FF_X31_Y68_N3 +\myVGA|ball_bounce:ball_speed_x[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:ball_speed_x[1]~0_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:ball_speed_x[1]~q\); + +-- Location: LCCOMB_X28_Y68_N8 +\myVGA|ball_b[0]~24\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[0]~24_combout\ = !\myVGA|ball_b\(0) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111100001111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datac => \myVGA|ball_b\(0), + combout => \myVGA|ball_b[0]~24_combout\); + +-- Location: FF_X28_Y68_N9 +\myVGA|ball_b[0]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_b[0]~24_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_b\(0)); + +-- Location: LCCOMB_X31_Y68_N8 +\myVGA|ball_x[1]~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[1]~10_cout\ = CARRY(\myVGA|ball_b\(0)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000010101010", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_b\(0), + datad => VCC, + cout => \myVGA|ball_x[1]~10_cout\); + +-- Location: LCCOMB_X31_Y68_N10 +\myVGA|ball_x[1]~11\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[1]~11_combout\ = (\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(1) & (!\myVGA|ball_x[1]~10_cout\)) # (!\myVGA|ball_x\(1) & ((\myVGA|ball_x[1]~10_cout\) # (GND))))) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(1) & +-- (\myVGA|ball_x[1]~10_cout\ & VCC)) # (!\myVGA|ball_x\(1) & (!\myVGA|ball_x[1]~10_cout\)))) +-- \myVGA|ball_x[1]~12\ = CARRY((\myVGA|ball_speed_x~0_combout\ & ((!\myVGA|ball_x[1]~10_cout\) # (!\myVGA|ball_x\(1)))) # (!\myVGA|ball_speed_x~0_combout\ & (!\myVGA|ball_x\(1) & !\myVGA|ball_x[1]~10_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_x~0_combout\, + datab => \myVGA|ball_x\(1), + datad => VCC, + cin => \myVGA|ball_x[1]~10_cout\, + combout => \myVGA|ball_x[1]~11_combout\, + cout => \myVGA|ball_x[1]~12\); + +-- Location: FF_X31_Y68_N11 +\myVGA|ball_x[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[1]~11_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(1)); + +-- Location: LCCOMB_X31_Y68_N12 +\myVGA|ball_x[2]~13\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[2]~13_combout\ = ((\myVGA|ball_speed_x~0_combout\ $ (\myVGA|ball_x\(2) $ (\myVGA|ball_x[1]~12\)))) # (GND) +-- \myVGA|ball_x[2]~14\ = CARRY((\myVGA|ball_speed_x~0_combout\ & (\myVGA|ball_x\(2) & !\myVGA|ball_x[1]~12\)) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(2)) # (!\myVGA|ball_x[1]~12\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_x~0_combout\, + datab => \myVGA|ball_x\(2), + datad => VCC, + cin => \myVGA|ball_x[1]~12\, + combout => \myVGA|ball_x[2]~13_combout\, + cout => \myVGA|ball_x[2]~14\); + +-- Location: FF_X31_Y68_N13 +\myVGA|ball_x[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[2]~13_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(2)); + +-- Location: LCCOMB_X31_Y68_N14 +\myVGA|ball_x[3]~15\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[3]~15_combout\ = (\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(3) & (!\myVGA|ball_x[2]~14\)) # (!\myVGA|ball_x\(3) & ((\myVGA|ball_x[2]~14\) # (GND))))) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(3) & (\myVGA|ball_x[2]~14\ & +-- VCC)) # (!\myVGA|ball_x\(3) & (!\myVGA|ball_x[2]~14\)))) +-- \myVGA|ball_x[3]~16\ = CARRY((\myVGA|ball_speed_x~0_combout\ & ((!\myVGA|ball_x[2]~14\) # (!\myVGA|ball_x\(3)))) # (!\myVGA|ball_speed_x~0_combout\ & (!\myVGA|ball_x\(3) & !\myVGA|ball_x[2]~14\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_x~0_combout\, + datab => \myVGA|ball_x\(3), + datad => VCC, + cin => \myVGA|ball_x[2]~14\, + combout => \myVGA|ball_x[3]~15_combout\, + cout => \myVGA|ball_x[3]~16\); + +-- Location: FF_X31_Y68_N15 +\myVGA|ball_x[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[3]~15_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(3)); + +-- Location: LCCOMB_X31_Y68_N16 +\myVGA|ball_x[4]~17\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[4]~17_combout\ = ((\myVGA|ball_speed_x~0_combout\ $ (\myVGA|ball_x\(4) $ (\myVGA|ball_x[3]~16\)))) # (GND) +-- \myVGA|ball_x[4]~18\ = CARRY((\myVGA|ball_speed_x~0_combout\ & (\myVGA|ball_x\(4) & !\myVGA|ball_x[3]~16\)) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(4)) # (!\myVGA|ball_x[3]~16\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_x~0_combout\, + datab => \myVGA|ball_x\(4), + datad => VCC, + cin => \myVGA|ball_x[3]~16\, + combout => \myVGA|ball_x[4]~17_combout\, + cout => \myVGA|ball_x[4]~18\); + +-- Location: FF_X31_Y68_N17 +\myVGA|ball_x[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[4]~17_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(4)); + +-- Location: LCCOMB_X31_Y68_N18 +\myVGA|ball_x[5]~19\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[5]~19_combout\ = (\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(5) & (!\myVGA|ball_x[4]~18\)) # (!\myVGA|ball_x\(5) & ((\myVGA|ball_x[4]~18\) # (GND))))) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(5) & (\myVGA|ball_x[4]~18\ & +-- VCC)) # (!\myVGA|ball_x\(5) & (!\myVGA|ball_x[4]~18\)))) +-- \myVGA|ball_x[5]~20\ = CARRY((\myVGA|ball_speed_x~0_combout\ & ((!\myVGA|ball_x[4]~18\) # (!\myVGA|ball_x\(5)))) # (!\myVGA|ball_speed_x~0_combout\ & (!\myVGA|ball_x\(5) & !\myVGA|ball_x[4]~18\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_x~0_combout\, + datab => \myVGA|ball_x\(5), + datad => VCC, + cin => \myVGA|ball_x[4]~18\, + combout => \myVGA|ball_x[5]~19_combout\, + cout => \myVGA|ball_x[5]~20\); + +-- Location: FF_X31_Y68_N19 +\myVGA|ball_x[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[5]~19_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(5)); + +-- Location: LCCOMB_X32_Y69_N20 +\myVGA|Add19~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add19~0_combout\ = \myVGA|BALL_WIDTH\(0) $ (VCC) +-- \myVGA|Add19~1\ = CARRY(\myVGA|BALL_WIDTH\(0)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011001111001100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(0), + datad => VCC, + combout => \myVGA|Add19~0_combout\, + cout => \myVGA|Add19~1\); + +-- Location: FF_X33_Y69_N21 +\myVGA|vary_ball_width:count[9]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~18_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[9]~q\); + +-- Location: LCCOMB_X33_Y69_N2 +\myVGA|Add18~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~0_combout\ = \myVGA|vary_ball_width:count[0]~q\ $ (VCC) +-- \myVGA|Add18~1\ = CARRY(\myVGA|vary_ball_width:count[0]~q\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011001111001100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|vary_ball_width:count[0]~q\, + datad => VCC, + combout => \myVGA|Add18~0_combout\, + cout => \myVGA|Add18~1\); + +-- Location: FF_X33_Y69_N3 +\myVGA|vary_ball_width:count[0]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~0_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[0]~q\); + +-- Location: LCCOMB_X33_Y69_N4 +\myVGA|Add18~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~2_combout\ = (\myVGA|vary_ball_width:count[1]~q\ & (!\myVGA|Add18~1\)) # (!\myVGA|vary_ball_width:count[1]~q\ & ((\myVGA|Add18~1\) # (GND))) +-- \myVGA|Add18~3\ = CARRY((!\myVGA|Add18~1\) # (!\myVGA|vary_ball_width:count[1]~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|vary_ball_width:count[1]~q\, + datad => VCC, + cin => \myVGA|Add18~1\, + combout => \myVGA|Add18~2_combout\, + cout => \myVGA|Add18~3\); + +-- Location: FF_X33_Y69_N5 +\myVGA|vary_ball_width:count[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~2_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[1]~q\); + +-- Location: LCCOMB_X33_Y69_N6 +\myVGA|Add18~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~4_combout\ = (\myVGA|vary_ball_width:count[2]~q\ & (\myVGA|Add18~3\ $ (GND))) # (!\myVGA|vary_ball_width:count[2]~q\ & (!\myVGA|Add18~3\ & VCC)) +-- \myVGA|Add18~5\ = CARRY((\myVGA|vary_ball_width:count[2]~q\ & !\myVGA|Add18~3\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|vary_ball_width:count[2]~q\, + datad => VCC, + cin => \myVGA|Add18~3\, + combout => \myVGA|Add18~4_combout\, + cout => \myVGA|Add18~5\); + +-- Location: FF_X33_Y69_N7 +\myVGA|vary_ball_width:count[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~4_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[2]~q\); + +-- Location: LCCOMB_X33_Y69_N8 +\myVGA|Add18~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~6_combout\ = (\myVGA|vary_ball_width:count[3]~q\ & (!\myVGA|Add18~5\)) # (!\myVGA|vary_ball_width:count[3]~q\ & ((\myVGA|Add18~5\) # (GND))) +-- \myVGA|Add18~7\ = CARRY((!\myVGA|Add18~5\) # (!\myVGA|vary_ball_width:count[3]~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|vary_ball_width:count[3]~q\, + datad => VCC, + cin => \myVGA|Add18~5\, + combout => \myVGA|Add18~6_combout\, + cout => \myVGA|Add18~7\); + +-- Location: FF_X33_Y69_N9 +\myVGA|vary_ball_width:count[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~6_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[3]~q\); + +-- Location: LCCOMB_X33_Y69_N10 +\myVGA|Add18~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~8_combout\ = (\myVGA|vary_ball_width:count[4]~q\ & (\myVGA|Add18~7\ $ (GND))) # (!\myVGA|vary_ball_width:count[4]~q\ & (!\myVGA|Add18~7\ & VCC)) +-- \myVGA|Add18~9\ = CARRY((\myVGA|vary_ball_width:count[4]~q\ & !\myVGA|Add18~7\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|vary_ball_width:count[4]~q\, + datad => VCC, + cin => \myVGA|Add18~7\, + combout => \myVGA|Add18~8_combout\, + cout => \myVGA|Add18~9\); + +-- Location: FF_X33_Y69_N11 +\myVGA|vary_ball_width:count[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~8_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[4]~q\); + +-- Location: LCCOMB_X33_Y69_N12 +\myVGA|Add18~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~10_combout\ = (\myVGA|vary_ball_width:count[5]~q\ & (!\myVGA|Add18~9\)) # (!\myVGA|vary_ball_width:count[5]~q\ & ((\myVGA|Add18~9\) # (GND))) +-- \myVGA|Add18~11\ = CARRY((!\myVGA|Add18~9\) # (!\myVGA|vary_ball_width:count[5]~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|vary_ball_width:count[5]~q\, + datad => VCC, + cin => \myVGA|Add18~9\, + combout => \myVGA|Add18~10_combout\, + cout => \myVGA|Add18~11\); + +-- Location: FF_X33_Y69_N13 +\myVGA|vary_ball_width:count[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~10_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[5]~q\); + +-- Location: LCCOMB_X33_Y69_N14 +\myVGA|Add18~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~12_combout\ = (\myVGA|vary_ball_width:count[6]~q\ & (\myVGA|Add18~11\ $ (GND))) # (!\myVGA|vary_ball_width:count[6]~q\ & (!\myVGA|Add18~11\ & VCC)) +-- \myVGA|Add18~13\ = CARRY((\myVGA|vary_ball_width:count[6]~q\ & !\myVGA|Add18~11\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|vary_ball_width:count[6]~q\, + datad => VCC, + cin => \myVGA|Add18~11\, + combout => \myVGA|Add18~12_combout\, + cout => \myVGA|Add18~13\); + +-- Location: FF_X33_Y69_N15 +\myVGA|vary_ball_width:count[6]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~12_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[6]~q\); + +-- Location: LCCOMB_X33_Y69_N16 +\myVGA|Add18~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~14_combout\ = (\myVGA|vary_ball_width:count[7]~q\ & (!\myVGA|Add18~13\)) # (!\myVGA|vary_ball_width:count[7]~q\ & ((\myVGA|Add18~13\) # (GND))) +-- \myVGA|Add18~15\ = CARRY((!\myVGA|Add18~13\) # (!\myVGA|vary_ball_width:count[7]~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|vary_ball_width:count[7]~q\, + datad => VCC, + cin => \myVGA|Add18~13\, + combout => \myVGA|Add18~14_combout\, + cout => \myVGA|Add18~15\); + +-- Location: FF_X33_Y69_N17 +\myVGA|vary_ball_width:count[7]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~14_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[7]~q\); + +-- Location: LCCOMB_X33_Y69_N18 +\myVGA|Add18~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~16_combout\ = (\myVGA|vary_ball_width:count[8]~q\ & (\myVGA|Add18~15\ $ (GND))) # (!\myVGA|vary_ball_width:count[8]~q\ & (!\myVGA|Add18~15\ & VCC)) +-- \myVGA|Add18~17\ = CARRY((\myVGA|vary_ball_width:count[8]~q\ & !\myVGA|Add18~15\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|vary_ball_width:count[8]~q\, + datad => VCC, + cin => \myVGA|Add18~15\, + combout => \myVGA|Add18~16_combout\, + cout => \myVGA|Add18~17\); + +-- Location: FF_X33_Y69_N19 +\myVGA|vary_ball_width:count[8]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add18~16_combout\, + ena => \myVGA|Equal1~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:count[8]~q\); + +-- Location: LCCOMB_X33_Y69_N20 +\myVGA|Add18~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add18~18_combout\ = \myVGA|Add18~17\ $ (\myVGA|vary_ball_width:count[9]~q\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111111110000", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datad => \myVGA|vary_ball_width:count[9]~q\, + cin => \myVGA|Add18~17\, + combout => \myVGA|Add18~18_combout\); + +-- Location: LCCOMB_X33_Y69_N0 +\myVGA|BALL_WIDTH[5]~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|BALL_WIDTH[5]~2_combout\ = (\myVGA|Add18~18_combout\ & \myVGA|Add18~16_combout\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010000010100000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add18~18_combout\, + datac => \myVGA|Add18~16_combout\, + combout => \myVGA|BALL_WIDTH[5]~2_combout\); + +-- Location: LCCOMB_X33_Y69_N22 +\myVGA|BALL_WIDTH[5]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|BALL_WIDTH[5]~1_combout\ = (\myVGA|Add18~10_combout\ & (\myVGA|Add18~14_combout\ & (\myVGA|Add18~12_combout\ & \myVGA|Add18~8_combout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add18~10_combout\, + datab => \myVGA|Add18~14_combout\, + datac => \myVGA|Add18~12_combout\, + datad => \myVGA|Add18~8_combout\, + combout => \myVGA|BALL_WIDTH[5]~1_combout\); + +-- Location: LCCOMB_X33_Y69_N24 +\myVGA|BALL_WIDTH[5]~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|BALL_WIDTH[5]~0_combout\ = (\myVGA|Add18~4_combout\ & (\myVGA|Add18~2_combout\ & (\myVGA|Add18~6_combout\ & \myVGA|Add18~0_combout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add18~4_combout\, + datab => \myVGA|Add18~2_combout\, + datac => \myVGA|Add18~6_combout\, + datad => \myVGA|Add18~0_combout\, + combout => \myVGA|BALL_WIDTH[5]~0_combout\); + +-- Location: LCCOMB_X33_Y69_N26 +\myVGA|BALL_WIDTH[5]~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|BALL_WIDTH[5]~3_combout\ = (\myVGA|Equal1~1_combout\ & (\myVGA|BALL_WIDTH[5]~2_combout\ & (\myVGA|BALL_WIDTH[5]~1_combout\ & \myVGA|BALL_WIDTH[5]~0_combout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Equal1~1_combout\, + datab => \myVGA|BALL_WIDTH[5]~2_combout\, + datac => \myVGA|BALL_WIDTH[5]~1_combout\, + datad => \myVGA|BALL_WIDTH[5]~0_combout\, + combout => \myVGA|BALL_WIDTH[5]~3_combout\); + +-- Location: FF_X32_Y69_N21 +\myVGA|BALL_WIDTH[0]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add19~0_combout\, + ena => \myVGA|BALL_WIDTH[5]~3_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|BALL_WIDTH\(0)); + +-- Location: LCCOMB_X32_Y69_N22 +\myVGA|Add19~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add19~2_combout\ = (\myVGA|BALL_WIDTH\(1) & ((\myVGA|growth~2_combout\ & (!\myVGA|Add19~1\)) # (!\myVGA|growth~2_combout\ & ((\myVGA|Add19~1\) # (GND))))) # (!\myVGA|BALL_WIDTH\(1) & ((\myVGA|growth~2_combout\ & (\myVGA|Add19~1\ & VCC)) # +-- (!\myVGA|growth~2_combout\ & (!\myVGA|Add19~1\)))) +-- \myVGA|Add19~3\ = CARRY((\myVGA|BALL_WIDTH\(1) & ((!\myVGA|Add19~1\) # (!\myVGA|growth~2_combout\))) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|growth~2_combout\ & !\myVGA|Add19~1\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(1), + datab => \myVGA|growth~2_combout\, + datad => VCC, + cin => \myVGA|Add19~1\, + combout => \myVGA|Add19~2_combout\, + cout => \myVGA|Add19~3\); + +-- Location: LCCOMB_X32_Y69_N2 +\myVGA|BALL_WIDTH[1]~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|BALL_WIDTH[1]~5_combout\ = !\myVGA|Add19~2_combout\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111100001111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datac => \myVGA|Add19~2_combout\, + combout => \myVGA|BALL_WIDTH[1]~5_combout\); + +-- Location: FF_X32_Y69_N3 +\myVGA|BALL_WIDTH[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|BALL_WIDTH[1]~5_combout\, + ena => \myVGA|BALL_WIDTH[5]~3_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|BALL_WIDTH\(1)); + +-- Location: LCCOMB_X32_Y69_N24 +\myVGA|Add19~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add19~4_combout\ = ((\myVGA|BALL_WIDTH\(2) $ (\myVGA|growth~2_combout\ $ (!\myVGA|Add19~3\)))) # (GND) +-- \myVGA|Add19~5\ = CARRY((\myVGA|BALL_WIDTH\(2) & ((\myVGA|growth~2_combout\) # (!\myVGA|Add19~3\))) # (!\myVGA|BALL_WIDTH\(2) & (\myVGA|growth~2_combout\ & !\myVGA|Add19~3\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100110001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(2), + datab => \myVGA|growth~2_combout\, + datad => VCC, + cin => \myVGA|Add19~3\, + combout => \myVGA|Add19~4_combout\, + cout => \myVGA|Add19~5\); + +-- Location: FF_X32_Y69_N25 +\myVGA|BALL_WIDTH[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add19~4_combout\, + ena => \myVGA|BALL_WIDTH[5]~3_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|BALL_WIDTH\(2)); + +-- Location: LCCOMB_X32_Y68_N0 +\myVGA|growth~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|growth~0_combout\ = (\myVGA|BALL_WIDTH\(1)) # ((\myVGA|BALL_WIDTH\(2)) # (\myVGA|BALL_WIDTH\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111111111111100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(1), + datac => \myVGA|BALL_WIDTH\(2), + datad => \myVGA|BALL_WIDTH\(0), + combout => \myVGA|growth~0_combout\); + +-- Location: FF_X32_Y69_N5 +\myVGA|vary_ball_width:growth[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|growth~2_combout\, + ena => \myVGA|BALL_WIDTH[5]~3_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|vary_ball_width:growth[1]~q\); + +-- Location: LCCOMB_X32_Y69_N26 +\myVGA|Add19~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add19~6_combout\ = (\myVGA|growth~2_combout\ & ((\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add19~5\)) # (!\myVGA|BALL_WIDTH\(3) & (\myVGA|Add19~5\ & VCC)))) # (!\myVGA|growth~2_combout\ & ((\myVGA|BALL_WIDTH\(3) & ((\myVGA|Add19~5\) # (GND))) # +-- (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add19~5\)))) +-- \myVGA|Add19~7\ = CARRY((\myVGA|growth~2_combout\ & (\myVGA|BALL_WIDTH\(3) & !\myVGA|Add19~5\)) # (!\myVGA|growth~2_combout\ & ((\myVGA|BALL_WIDTH\(3)) # (!\myVGA|Add19~5\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100101001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|growth~2_combout\, + datab => \myVGA|BALL_WIDTH\(3), + datad => VCC, + cin => \myVGA|Add19~5\, + combout => \myVGA|Add19~6_combout\, + cout => \myVGA|Add19~7\); + +-- Location: LCCOMB_X32_Y69_N0 +\myVGA|BALL_WIDTH[3]~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|BALL_WIDTH[3]~4_combout\ = !\myVGA|Add19~6_combout\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111100001111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datac => \myVGA|Add19~6_combout\, + combout => \myVGA|BALL_WIDTH[3]~4_combout\); + +-- Location: FF_X32_Y69_N1 +\myVGA|BALL_WIDTH[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|BALL_WIDTH[3]~4_combout\, + ena => \myVGA|BALL_WIDTH[5]~3_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|BALL_WIDTH\(3)); + +-- Location: LCCOMB_X32_Y69_N28 +\myVGA|Add19~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add19~8_combout\ = ((\myVGA|growth~2_combout\ $ (\myVGA|BALL_WIDTH\(4) $ (!\myVGA|Add19~7\)))) # (GND) +-- \myVGA|Add19~9\ = CARRY((\myVGA|growth~2_combout\ & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|Add19~7\))) # (!\myVGA|growth~2_combout\ & (\myVGA|BALL_WIDTH\(4) & !\myVGA|Add19~7\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100110001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|growth~2_combout\, + datab => \myVGA|BALL_WIDTH\(4), + datad => VCC, + cin => \myVGA|Add19~7\, + combout => \myVGA|Add19~8_combout\, + cout => \myVGA|Add19~9\); + +-- Location: FF_X32_Y69_N29 +\myVGA|BALL_WIDTH[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add19~8_combout\, + ena => \myVGA|BALL_WIDTH[5]~3_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|BALL_WIDTH\(4)); + +-- Location: LCCOMB_X32_Y69_N6 +\myVGA|growth~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|growth~1_combout\ = (\myVGA|BALL_WIDTH\(3) & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|BALL_WIDTH\(5)))) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|BALL_WIDTH\(5) & \myVGA|BALL_WIDTH\(4))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100111100001100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(3), + datac => \myVGA|BALL_WIDTH\(5), + datad => \myVGA|BALL_WIDTH\(4), + combout => \myVGA|growth~1_combout\); + +-- Location: LCCOMB_X32_Y69_N4 +\myVGA|growth~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|growth~2_combout\ = (\myVGA|BALL_WIDTH\(5) & ((\myVGA|vary_ball_width:growth[1]~q\) # ((!\myVGA|growth~0_combout\ & \myVGA|growth~1_combout\)))) # (!\myVGA|BALL_WIDTH\(5) & (\myVGA|vary_ball_width:growth[1]~q\ & ((\myVGA|growth~0_combout\) # +-- (\myVGA|growth~1_combout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111001011100000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(5), + datab => \myVGA|growth~0_combout\, + datac => \myVGA|vary_ball_width:growth[1]~q\, + datad => \myVGA|growth~1_combout\, + combout => \myVGA|growth~2_combout\); + +-- Location: LCCOMB_X32_Y69_N30 +\myVGA|Add19~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add19~10_combout\ = \myVGA|BALL_WIDTH\(5) $ (\myVGA|growth~2_combout\ $ (\myVGA|Add19~9\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011010010110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(5), + datab => \myVGA|growth~2_combout\, + cin => \myVGA|Add19~9\, + combout => \myVGA|Add19~10_combout\); + +-- Location: FF_X32_Y69_N31 +\myVGA|BALL_WIDTH[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|Add19~10_combout\, + ena => \myVGA|BALL_WIDTH[5]~3_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|BALL_WIDTH\(5)); + +-- Location: LCCOMB_X30_Y67_N20 +\myVGA|LessThan10~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan10~1_cout\ = CARRY((\myVGA|BALL_WIDTH\(0) & !\myVGA|ball_b\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000100010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(0), + datab => \myVGA|ball_b\(0), + datad => VCC, + cout => \myVGA|LessThan10~1_cout\); + +-- Location: LCCOMB_X30_Y67_N22 +\myVGA|LessThan10~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan10~3_cout\ = CARRY((\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1)) # (!\myVGA|LessThan10~1_cout\))) # (!\myVGA|ball_x\(1) & (\myVGA|BALL_WIDTH\(1) & !\myVGA|LessThan10~1_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000010001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(1), + datab => \myVGA|BALL_WIDTH\(1), + datad => VCC, + cin => \myVGA|LessThan10~1_cout\, + cout => \myVGA|LessThan10~3_cout\); + +-- Location: LCCOMB_X30_Y67_N24 +\myVGA|LessThan10~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan10~5_cout\ = CARRY((\myVGA|ball_x\(2) & (\myVGA|BALL_WIDTH\(2) & !\myVGA|LessThan10~3_cout\)) # (!\myVGA|ball_x\(2) & ((\myVGA|BALL_WIDTH\(2)) # (!\myVGA|LessThan10~3_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(2), + datab => \myVGA|BALL_WIDTH\(2), + datad => VCC, + cin => \myVGA|LessThan10~3_cout\, + cout => \myVGA|LessThan10~5_cout\); + +-- Location: LCCOMB_X30_Y67_N26 +\myVGA|LessThan10~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan10~7_cout\ = CARRY((\myVGA|ball_x\(3) & ((\myVGA|BALL_WIDTH\(3)) # (!\myVGA|LessThan10~5_cout\))) # (!\myVGA|ball_x\(3) & (\myVGA|BALL_WIDTH\(3) & !\myVGA|LessThan10~5_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000010001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(3), + datab => \myVGA|BALL_WIDTH\(3), + datad => VCC, + cin => \myVGA|LessThan10~5_cout\, + cout => \myVGA|LessThan10~7_cout\); + +-- Location: LCCOMB_X30_Y67_N28 +\myVGA|LessThan10~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan10~9_cout\ = CARRY((\myVGA|ball_x\(4) & (\myVGA|BALL_WIDTH\(4) & !\myVGA|LessThan10~7_cout\)) # (!\myVGA|ball_x\(4) & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|LessThan10~7_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(4), + datab => \myVGA|BALL_WIDTH\(4), + datad => VCC, + cin => \myVGA|LessThan10~7_cout\, + cout => \myVGA|LessThan10~9_cout\); + +-- Location: LCCOMB_X30_Y67_N30 +\myVGA|LessThan10~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan10~10_combout\ = (\myVGA|ball_x\(5) & (\myVGA|LessThan10~9_cout\ & \myVGA|BALL_WIDTH\(5))) # (!\myVGA|ball_x\(5) & ((\myVGA|LessThan10~9_cout\) # (\myVGA|BALL_WIDTH\(5)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111010101010000", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(5), + datad => \myVGA|BALL_WIDTH\(5), + cin => \myVGA|LessThan10~9_cout\, + combout => \myVGA|LessThan10~10_combout\); + +-- Location: LCCOMB_X31_Y68_N20 +\myVGA|ball_x[6]~21\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[6]~21_combout\ = ((\myVGA|ball_speed_x~0_combout\ $ (\myVGA|ball_x\(6) $ (\myVGA|ball_x[5]~20\)))) # (GND) +-- \myVGA|ball_x[6]~22\ = CARRY((\myVGA|ball_speed_x~0_combout\ & (\myVGA|ball_x\(6) & !\myVGA|ball_x[5]~20\)) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(6)) # (!\myVGA|ball_x[5]~20\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_x~0_combout\, + datab => \myVGA|ball_x\(6), + datad => VCC, + cin => \myVGA|ball_x[5]~20\, + combout => \myVGA|ball_x[6]~21_combout\, + cout => \myVGA|ball_x[6]~22\); + +-- Location: FF_X31_Y68_N21 +\myVGA|ball_x[6]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[6]~21_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(6)); + +-- Location: LCCOMB_X31_Y68_N22 +\myVGA|ball_x[7]~23\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[7]~23_combout\ = (\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(7) & (!\myVGA|ball_x[6]~22\)) # (!\myVGA|ball_x\(7) & ((\myVGA|ball_x[6]~22\) # (GND))))) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(7) & (\myVGA|ball_x[6]~22\ & +-- VCC)) # (!\myVGA|ball_x\(7) & (!\myVGA|ball_x[6]~22\)))) +-- \myVGA|ball_x[7]~24\ = CARRY((\myVGA|ball_speed_x~0_combout\ & ((!\myVGA|ball_x[6]~22\) # (!\myVGA|ball_x\(7)))) # (!\myVGA|ball_speed_x~0_combout\ & (!\myVGA|ball_x\(7) & !\myVGA|ball_x[6]~22\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_x~0_combout\, + datab => \myVGA|ball_x\(7), + datad => VCC, + cin => \myVGA|ball_x[6]~22\, + combout => \myVGA|ball_x[7]~23_combout\, + cout => \myVGA|ball_x[7]~24\); + +-- Location: FF_X31_Y68_N23 +\myVGA|ball_x[7]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[7]~23_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(7)); + +-- Location: LCCOMB_X31_Y68_N0 +\myVGA|LessThan10~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan10~12_combout\ = (!\myVGA|ball_x\(9) & (\myVGA|LessThan10~10_combout\ & (!\myVGA|ball_x\(7) & !\myVGA|ball_x\(6)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000000100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(9), + datab => \myVGA|LessThan10~10_combout\, + datac => \myVGA|ball_x\(7), + datad => \myVGA|ball_x\(6), + combout => \myVGA|LessThan10~12_combout\); + +-- Location: LCCOMB_X32_Y69_N8 +\myVGA|Add3~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add3~0_combout\ = (\myVGA|BALL_WIDTH\(1) & (\myVGA|BALL_WIDTH\(0) $ (GND))) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|BALL_WIDTH\(0) & VCC)) +-- \myVGA|Add3~1\ = CARRY((\myVGA|BALL_WIDTH\(1) & !\myVGA|BALL_WIDTH\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001100100100010", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(1), + datab => \myVGA|BALL_WIDTH\(0), + datad => VCC, + combout => \myVGA|Add3~0_combout\, + cout => \myVGA|Add3~1\); + +-- Location: LCCOMB_X32_Y69_N10 +\myVGA|Add3~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add3~2_combout\ = (\myVGA|BALL_WIDTH\(2) & ((\myVGA|Add3~1\) # (GND))) # (!\myVGA|BALL_WIDTH\(2) & (!\myVGA|Add3~1\)) +-- \myVGA|Add3~3\ = CARRY((\myVGA|BALL_WIDTH\(2)) # (!\myVGA|Add3~1\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001111001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(2), + datad => VCC, + cin => \myVGA|Add3~1\, + combout => \myVGA|Add3~2_combout\, + cout => \myVGA|Add3~3\); + +-- Location: LCCOMB_X32_Y69_N12 +\myVGA|Add3~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add3~4_combout\ = (\myVGA|BALL_WIDTH\(3) & (\myVGA|Add3~3\ $ (GND))) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add3~3\ & VCC)) +-- \myVGA|Add3~5\ = CARRY((\myVGA|BALL_WIDTH\(3) & !\myVGA|Add3~3\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(3), + datad => VCC, + cin => \myVGA|Add3~3\, + combout => \myVGA|Add3~4_combout\, + cout => \myVGA|Add3~5\); + +-- Location: LCCOMB_X32_Y69_N14 +\myVGA|Add3~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add3~6_combout\ = (\myVGA|BALL_WIDTH\(4) & ((\myVGA|Add3~5\) # (GND))) # (!\myVGA|BALL_WIDTH\(4) & (!\myVGA|Add3~5\)) +-- \myVGA|Add3~7\ = CARRY((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|Add3~5\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001111001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(4), + datad => VCC, + cin => \myVGA|Add3~5\, + combout => \myVGA|Add3~6_combout\, + cout => \myVGA|Add3~7\); + +-- Location: LCCOMB_X32_Y69_N16 +\myVGA|Add3~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add3~8_combout\ = (\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add3~7\ & VCC)) # (!\myVGA|BALL_WIDTH\(5) & (\myVGA|Add3~7\ $ (GND))) +-- \myVGA|Add3~9\ = CARRY((!\myVGA|BALL_WIDTH\(5) & !\myVGA|Add3~7\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101000000101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(5), + datad => VCC, + cin => \myVGA|Add3~7\, + combout => \myVGA|Add3~8_combout\, + cout => \myVGA|Add3~9\); + +-- Location: LCCOMB_X30_Y68_N8 +\myVGA|LessThan8~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~6_combout\ = (\myVGA|ball_x\(5) & (!\myVGA|ball_x\(4) & (\myVGA|Add3~6_combout\ & \myVGA|Add3~8_combout\))) # (!\myVGA|ball_x\(5) & ((\myVGA|Add3~8_combout\) # ((!\myVGA|ball_x\(4) & \myVGA|Add3~6_combout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0111001100010000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(4), + datab => \myVGA|ball_x\(5), + datac => \myVGA|Add3~6_combout\, + datad => \myVGA|Add3~8_combout\, + combout => \myVGA|LessThan8~6_combout\); + +-- Location: LCCOMB_X32_Y69_N18 +\myVGA|Add3~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add3~10_combout\ = !\myVGA|Add3~9\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111100001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + cin => \myVGA|Add3~9\, + combout => \myVGA|Add3~10_combout\); + +-- Location: LCCOMB_X31_Y68_N6 +\myVGA|LessThan8~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~7_combout\ = (\myVGA|LessThan8~6_combout\ & (((!\myVGA|ball_x\(6) & !\myVGA|Add3~10_combout\)) # (!\myVGA|ball_x\(7)))) # (!\myVGA|LessThan8~6_combout\ & (!\myVGA|ball_x\(7) & ((!\myVGA|Add3~10_combout\) # (!\myVGA|ball_x\(6))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000101100101111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|LessThan8~6_combout\, + datab => \myVGA|ball_x\(6), + datac => \myVGA|ball_x\(7), + datad => \myVGA|Add3~10_combout\, + combout => \myVGA|LessThan8~7_combout\); + +-- Location: LCCOMB_X31_Y68_N24 +\myVGA|ball_x[8]~25\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[8]~25_combout\ = ((\myVGA|ball_speed_x~0_combout\ $ (\myVGA|ball_x\(8) $ (\myVGA|ball_x[7]~24\)))) # (GND) +-- \myVGA|ball_x[8]~26\ = CARRY((\myVGA|ball_speed_x~0_combout\ & (\myVGA|ball_x\(8) & !\myVGA|ball_x[7]~24\)) # (!\myVGA|ball_speed_x~0_combout\ & ((\myVGA|ball_x\(8)) # (!\myVGA|ball_x[7]~24\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_x~0_combout\, + datab => \myVGA|ball_x\(8), + datad => VCC, + cin => \myVGA|ball_x[7]~24\, + combout => \myVGA|ball_x[8]~25_combout\, + cout => \myVGA|ball_x[8]~26\); + +-- Location: FF_X31_Y68_N25 +\myVGA|ball_x[8]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[8]~25_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(8)); + +-- Location: LCCOMB_X30_Y68_N6 +\myVGA|LessThan8~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~0_combout\ = \myVGA|ball_x\(5) $ (\myVGA|Add3~8_combout\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011001111001100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_x\(5), + datad => \myVGA|Add3~8_combout\, + combout => \myVGA|LessThan8~0_combout\); + +-- Location: LCCOMB_X31_Y68_N28 +\myVGA|LessThan8~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~1_combout\ = (!\myVGA|LessThan8~0_combout\ & ((\myVGA|Add3~10_combout\ & (!\myVGA|ball_x\(7) & \myVGA|ball_x\(6))) # (!\myVGA|Add3~10_combout\ & (\myVGA|ball_x\(7) & !\myVGA|ball_x\(6))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000001000010000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add3~10_combout\, + datab => \myVGA|LessThan8~0_combout\, + datac => \myVGA|ball_x\(7), + datad => \myVGA|ball_x\(6), + combout => \myVGA|LessThan8~1_combout\); + +-- Location: LCCOMB_X32_Y68_N2 +\myVGA|LessThan8~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~2_combout\ = (\myVGA|ball_x\(1) & (\myVGA|BALL_WIDTH\(0) & (\myVGA|Add3~0_combout\ & !\myVGA|ball_b\(0)))) # (!\myVGA|ball_x\(1) & ((\myVGA|Add3~0_combout\) # ((\myVGA|BALL_WIDTH\(0) & !\myVGA|ball_b\(0))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101000011010100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(1), + datab => \myVGA|BALL_WIDTH\(0), + datac => \myVGA|Add3~0_combout\, + datad => \myVGA|ball_b\(0), + combout => \myVGA|LessThan8~2_combout\); + +-- Location: LCCOMB_X32_Y68_N26 +\myVGA|LessThan8~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~3_combout\ = (\myVGA|ball_x\(2) & (\myVGA|LessThan8~2_combout\ & \myVGA|Add3~2_combout\)) # (!\myVGA|ball_x\(2) & ((\myVGA|LessThan8~2_combout\) # (\myVGA|Add3~2_combout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1101110101000100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(2), + datab => \myVGA|LessThan8~2_combout\, + datad => \myVGA|Add3~2_combout\, + combout => \myVGA|LessThan8~3_combout\); + +-- Location: LCCOMB_X32_Y68_N28 +\myVGA|LessThan8~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~4_combout\ = (\myVGA|LessThan8~3_combout\ & ((\myVGA|Add3~4_combout\) # (!\myVGA|ball_x\(3)))) # (!\myVGA|LessThan8~3_combout\ & (\myVGA|Add3~4_combout\ & !\myVGA|ball_x\(3))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010000011111010", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|LessThan8~3_combout\, + datac => \myVGA|Add3~4_combout\, + datad => \myVGA|ball_x\(3), + combout => \myVGA|LessThan8~4_combout\); + +-- Location: LCCOMB_X32_Y68_N30 +\myVGA|LessThan8~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~5_combout\ = (\myVGA|LessThan8~1_combout\ & (\myVGA|LessThan8~4_combout\ & (\myVGA|ball_x\(4) $ (!\myVGA|Add3~6_combout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000010000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(4), + datab => \myVGA|LessThan8~1_combout\, + datac => \myVGA|Add3~6_combout\, + datad => \myVGA|LessThan8~4_combout\, + combout => \myVGA|LessThan8~5_combout\); + +-- Location: LCCOMB_X31_Y68_N4 +\myVGA|LessThan8~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan8~8_combout\ = ((!\myVGA|ball_x\(8) & ((\myVGA|LessThan8~7_combout\) # (\myVGA|LessThan8~5_combout\)))) # (!\myVGA|ball_x\(9)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011001011111111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|LessThan8~7_combout\, + datab => \myVGA|ball_x\(8), + datac => \myVGA|LessThan8~5_combout\, + datad => \myVGA|ball_x\(9), + combout => \myVGA|LessThan8~8_combout\); + +-- Location: LCCOMB_X31_Y68_N30 +\myVGA|ball_speed_x~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_speed_x~0_combout\ = (\myVGA|LessThan10~12_combout\ & ((\myVGA|ball_bounce:ball_speed_x[1]~q\ $ (\myVGA|LessThan8~8_combout\)) # (!\myVGA|ball_x\(8)))) # (!\myVGA|LessThan10~12_combout\ & (\myVGA|ball_bounce:ball_speed_x[1]~q\ $ +-- ((\myVGA|LessThan8~8_combout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101011011110", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_bounce:ball_speed_x[1]~q\, + datab => \myVGA|LessThan10~12_combout\, + datac => \myVGA|LessThan8~8_combout\, + datad => \myVGA|ball_x\(8), + combout => \myVGA|ball_speed_x~0_combout\); + +-- Location: LCCOMB_X31_Y68_N26 +\myVGA|ball_x[9]~27\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_x[9]~27_combout\ = \myVGA|ball_x\(9) $ (\myVGA|ball_x[8]~26\ $ (!\myVGA|ball_speed_x~0_combout\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101010100101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(9), + datad => \myVGA|ball_speed_x~0_combout\, + cin => \myVGA|ball_x[8]~26\, + combout => \myVGA|ball_x[9]~27_combout\); + +-- Location: FF_X31_Y68_N27 +\myVGA|ball_x[9]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_x[9]~27_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_x\(9)); + +-- Location: LCCOMB_X32_Y67_N10 +\myVGA|Add14~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~0_combout\ = (\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) $ (VCC))) # (!\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) & VCC)) +-- \myVGA|Add14~1\ = CARRY((\myVGA|BALL_WIDTH\(0) & \myVGA|ball_b\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110011010001000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(0), + datab => \myVGA|ball_b\(0), + datad => VCC, + combout => \myVGA|Add14~0_combout\, + cout => \myVGA|Add14~1\); + +-- Location: LCCOMB_X32_Y67_N12 +\myVGA|Add14~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~2_combout\ = (\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add14~1\)) # (!\myVGA|BALL_WIDTH\(1) & (\myVGA|Add14~1\ & VCC)))) # (!\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1) & ((\myVGA|Add14~1\) # (GND))) # (!\myVGA|BALL_WIDTH\(1) & +-- (!\myVGA|Add14~1\)))) +-- \myVGA|Add14~3\ = CARRY((\myVGA|ball_x\(1) & (\myVGA|BALL_WIDTH\(1) & !\myVGA|Add14~1\)) # (!\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1)) # (!\myVGA|Add14~1\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100101001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(1), + datab => \myVGA|BALL_WIDTH\(1), + datad => VCC, + cin => \myVGA|Add14~1\, + combout => \myVGA|Add14~2_combout\, + cout => \myVGA|Add14~3\); + +-- Location: LCCOMB_X32_Y67_N14 +\myVGA|Add14~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~4_combout\ = ((\myVGA|BALL_WIDTH\(2) $ (\myVGA|ball_x\(2) $ (!\myVGA|Add14~3\)))) # (GND) +-- \myVGA|Add14~5\ = CARRY((\myVGA|BALL_WIDTH\(2) & ((\myVGA|ball_x\(2)) # (!\myVGA|Add14~3\))) # (!\myVGA|BALL_WIDTH\(2) & (\myVGA|ball_x\(2) & !\myVGA|Add14~3\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100110001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(2), + datab => \myVGA|ball_x\(2), + datad => VCC, + cin => \myVGA|Add14~3\, + combout => \myVGA|Add14~4_combout\, + cout => \myVGA|Add14~5\); + +-- Location: LCCOMB_X32_Y67_N16 +\myVGA|Add14~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~6_combout\ = (\myVGA|BALL_WIDTH\(3) & ((\myVGA|ball_x\(3) & (!\myVGA|Add14~5\)) # (!\myVGA|ball_x\(3) & ((\myVGA|Add14~5\) # (GND))))) # (!\myVGA|BALL_WIDTH\(3) & ((\myVGA|ball_x\(3) & (\myVGA|Add14~5\ & VCC)) # (!\myVGA|ball_x\(3) & +-- (!\myVGA|Add14~5\)))) +-- \myVGA|Add14~7\ = CARRY((\myVGA|BALL_WIDTH\(3) & ((!\myVGA|Add14~5\) # (!\myVGA|ball_x\(3)))) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|ball_x\(3) & !\myVGA|Add14~5\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(3), + datab => \myVGA|ball_x\(3), + datad => VCC, + cin => \myVGA|Add14~5\, + combout => \myVGA|Add14~6_combout\, + cout => \myVGA|Add14~7\); + +-- Location: LCCOMB_X32_Y67_N18 +\myVGA|Add14~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~8_combout\ = ((\myVGA|BALL_WIDTH\(4) $ (\myVGA|ball_x\(4) $ (!\myVGA|Add14~7\)))) # (GND) +-- \myVGA|Add14~9\ = CARRY((\myVGA|BALL_WIDTH\(4) & ((\myVGA|ball_x\(4)) # (!\myVGA|Add14~7\))) # (!\myVGA|BALL_WIDTH\(4) & (\myVGA|ball_x\(4) & !\myVGA|Add14~7\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100110001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(4), + datab => \myVGA|ball_x\(4), + datad => VCC, + cin => \myVGA|Add14~7\, + combout => \myVGA|Add14~8_combout\, + cout => \myVGA|Add14~9\); + +-- Location: LCCOMB_X32_Y67_N20 +\myVGA|Add14~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~10_combout\ = (\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5) & (\myVGA|Add14~9\ & VCC)) # (!\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add14~9\)))) # (!\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add14~9\)) # (!\myVGA|BALL_WIDTH\(5) & +-- ((\myVGA|Add14~9\) # (GND))))) +-- \myVGA|Add14~11\ = CARRY((\myVGA|ball_x\(5) & (!\myVGA|BALL_WIDTH\(5) & !\myVGA|Add14~9\)) # (!\myVGA|ball_x\(5) & ((!\myVGA|Add14~9\) # (!\myVGA|BALL_WIDTH\(5))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000010111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(5), + datab => \myVGA|BALL_WIDTH\(5), + datad => VCC, + cin => \myVGA|Add14~9\, + combout => \myVGA|Add14~10_combout\, + cout => \myVGA|Add14~11\); + +-- Location: LCCOMB_X32_Y67_N22 +\myVGA|Add14~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~12_combout\ = (\myVGA|ball_x\(6) & (\myVGA|Add14~11\ $ (GND))) # (!\myVGA|ball_x\(6) & (!\myVGA|Add14~11\ & VCC)) +-- \myVGA|Add14~13\ = CARRY((\myVGA|ball_x\(6) & !\myVGA|Add14~11\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_x\(6), + datad => VCC, + cin => \myVGA|Add14~11\, + combout => \myVGA|Add14~12_combout\, + cout => \myVGA|Add14~13\); + +-- Location: LCCOMB_X32_Y67_N24 +\myVGA|Add14~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~14_combout\ = (\myVGA|ball_x\(7) & (!\myVGA|Add14~13\)) # (!\myVGA|ball_x\(7) & ((\myVGA|Add14~13\) # (GND))) +-- \myVGA|Add14~15\ = CARRY((!\myVGA|Add14~13\) # (!\myVGA|ball_x\(7))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(7), + datad => VCC, + cin => \myVGA|Add14~13\, + combout => \myVGA|Add14~14_combout\, + cout => \myVGA|Add14~15\); + +-- Location: LCCOMB_X32_Y67_N26 +\myVGA|Add14~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~16_combout\ = (\myVGA|ball_x\(8) & (\myVGA|Add14~15\ $ (GND))) # (!\myVGA|ball_x\(8) & (!\myVGA|Add14~15\ & VCC)) +-- \myVGA|Add14~17\ = CARRY((\myVGA|ball_x\(8) & !\myVGA|Add14~15\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(8), + datad => VCC, + cin => \myVGA|Add14~15\, + combout => \myVGA|Add14~16_combout\, + cout => \myVGA|Add14~17\); + +-- Location: LCCOMB_X32_Y67_N28 +\myVGA|Add14~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~18_combout\ = (\myVGA|ball_x\(9) & (!\myVGA|Add14~17\)) # (!\myVGA|ball_x\(9) & ((\myVGA|Add14~17\) # (GND))) +-- \myVGA|Add14~19\ = CARRY((!\myVGA|Add14~17\) # (!\myVGA|ball_x\(9))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(9), + datad => VCC, + cin => \myVGA|Add14~17\, + combout => \myVGA|Add14~18_combout\, + cout => \myVGA|Add14~19\); + +-- Location: LCCOMB_X33_Y67_N0 +\myVGA|LessThan12~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~1_cout\ = CARRY((\myVGA|Add14~0_combout\ & !\myVGA|h_px_count\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000100010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add14~0_combout\, + datab => \myVGA|h_px_count\(0), + datad => VCC, + cout => \myVGA|LessThan12~1_cout\); + +-- Location: LCCOMB_X33_Y67_N2 +\myVGA|LessThan12~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~3_cout\ = CARRY((\myVGA|Add14~2_combout\ & (\myVGA|h_px_count\(1) & !\myVGA|LessThan12~1_cout\)) # (!\myVGA|Add14~2_combout\ & ((\myVGA|h_px_count\(1)) # (!\myVGA|LessThan12~1_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add14~2_combout\, + datab => \myVGA|h_px_count\(1), + datad => VCC, + cin => \myVGA|LessThan12~1_cout\, + cout => \myVGA|LessThan12~3_cout\); + +-- Location: LCCOMB_X33_Y67_N4 +\myVGA|LessThan12~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~5_cout\ = CARRY((\myVGA|Add14~4_combout\ & ((!\myVGA|LessThan12~3_cout\) # (!\myVGA|h_px_count\(2)))) # (!\myVGA|Add14~4_combout\ & (!\myVGA|h_px_count\(2) & !\myVGA|LessThan12~3_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add14~4_combout\, + datab => \myVGA|h_px_count\(2), + datad => VCC, + cin => \myVGA|LessThan12~3_cout\, + cout => \myVGA|LessThan12~5_cout\); + +-- Location: LCCOMB_X33_Y67_N6 +\myVGA|LessThan12~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~7_cout\ = CARRY((\myVGA|Add14~6_combout\ & (\myVGA|h_px_count\(3) & !\myVGA|LessThan12~5_cout\)) # (!\myVGA|Add14~6_combout\ & ((\myVGA|h_px_count\(3)) # (!\myVGA|LessThan12~5_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add14~6_combout\, + datab => \myVGA|h_px_count\(3), + datad => VCC, + cin => \myVGA|LessThan12~5_cout\, + cout => \myVGA|LessThan12~7_cout\); + +-- Location: LCCOMB_X33_Y67_N8 +\myVGA|LessThan12~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~9_cout\ = CARRY((\myVGA|h_px_count\(4) & (\myVGA|Add14~8_combout\ & !\myVGA|LessThan12~7_cout\)) # (!\myVGA|h_px_count\(4) & ((\myVGA|Add14~8_combout\) # (!\myVGA|LessThan12~7_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(4), + datab => \myVGA|Add14~8_combout\, + datad => VCC, + cin => \myVGA|LessThan12~7_cout\, + cout => \myVGA|LessThan12~9_cout\); + +-- Location: LCCOMB_X33_Y67_N10 +\myVGA|LessThan12~11\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~11_cout\ = CARRY((\myVGA|h_px_count\(5) & ((!\myVGA|LessThan12~9_cout\) # (!\myVGA|Add14~10_combout\))) # (!\myVGA|h_px_count\(5) & (!\myVGA|Add14~10_combout\ & !\myVGA|LessThan12~9_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(5), + datab => \myVGA|Add14~10_combout\, + datad => VCC, + cin => \myVGA|LessThan12~9_cout\, + cout => \myVGA|LessThan12~11_cout\); + +-- Location: LCCOMB_X33_Y67_N12 +\myVGA|LessThan12~13\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~13_cout\ = CARRY((\myVGA|h_px_count\(6) & (\myVGA|Add14~12_combout\ & !\myVGA|LessThan12~11_cout\)) # (!\myVGA|h_px_count\(6) & ((\myVGA|Add14~12_combout\) # (!\myVGA|LessThan12~11_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(6), + datab => \myVGA|Add14~12_combout\, + datad => VCC, + cin => \myVGA|LessThan12~11_cout\, + cout => \myVGA|LessThan12~13_cout\); + +-- Location: LCCOMB_X33_Y67_N14 +\myVGA|LessThan12~15\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~15_cout\ = CARRY((\myVGA|Add14~14_combout\ & (\myVGA|h_px_count\(7) & !\myVGA|LessThan12~13_cout\)) # (!\myVGA|Add14~14_combout\ & ((\myVGA|h_px_count\(7)) # (!\myVGA|LessThan12~13_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add14~14_combout\, + datab => \myVGA|h_px_count\(7), + datad => VCC, + cin => \myVGA|LessThan12~13_cout\, + cout => \myVGA|LessThan12~15_cout\); + +-- Location: LCCOMB_X33_Y67_N16 +\myVGA|LessThan12~17\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~17_cout\ = CARRY((\myVGA|Add14~16_combout\ & ((!\myVGA|LessThan12~15_cout\) # (!\myVGA|h_px_count\(8)))) # (!\myVGA|Add14~16_combout\ & (!\myVGA|h_px_count\(8) & !\myVGA|LessThan12~15_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add14~16_combout\, + datab => \myVGA|h_px_count\(8), + datad => VCC, + cin => \myVGA|LessThan12~15_cout\, + cout => \myVGA|LessThan12~17_cout\); + +-- Location: LCCOMB_X33_Y67_N18 +\myVGA|LessThan12~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan12~18_combout\ = (\myVGA|h_px_count\(9) & (\myVGA|Add14~18_combout\ & \myVGA|LessThan12~17_cout\)) # (!\myVGA|h_px_count\(9) & ((\myVGA|Add14~18_combout\) # (\myVGA|LessThan12~17_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1101010011010100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(9), + datab => \myVGA|Add14~18_combout\, + cin => \myVGA|LessThan12~17_cout\, + combout => \myVGA|LessThan12~18_combout\); + +-- Location: LCCOMB_X30_Y68_N14 +\myVGA|ball_y[1]~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[1]~9_cout\ = CARRY(\myVGA|ball_b\(0)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000011001100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_b\(0), + datad => VCC, + cout => \myVGA|ball_y[1]~9_cout\); + +-- Location: LCCOMB_X30_Y68_N16 +\myVGA|ball_y[1]~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[1]~10_combout\ = (\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(1) & (!\myVGA|ball_y[1]~9_cout\)) # (!\myVGA|ball_y\(1) & ((\myVGA|ball_y[1]~9_cout\) # (GND))))) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(1) & +-- (\myVGA|ball_y[1]~9_cout\ & VCC)) # (!\myVGA|ball_y\(1) & (!\myVGA|ball_y[1]~9_cout\)))) +-- \myVGA|ball_y[1]~11\ = CARRY((\myVGA|ball_speed_y~1_combout\ & ((!\myVGA|ball_y[1]~9_cout\) # (!\myVGA|ball_y\(1)))) # (!\myVGA|ball_speed_y~1_combout\ & (!\myVGA|ball_y\(1) & !\myVGA|ball_y[1]~9_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_y~1_combout\, + datab => \myVGA|ball_y\(1), + datad => VCC, + cin => \myVGA|ball_y[1]~9_cout\, + combout => \myVGA|ball_y[1]~10_combout\, + cout => \myVGA|ball_y[1]~11\); + +-- Location: FF_X30_Y68_N17 +\myVGA|ball_y[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_y[1]~10_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_y\(1)); + +-- Location: LCCOMB_X30_Y68_N18 +\myVGA|ball_y[2]~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[2]~12_combout\ = ((\myVGA|ball_speed_y~1_combout\ $ (\myVGA|ball_y\(2) $ (\myVGA|ball_y[1]~11\)))) # (GND) +-- \myVGA|ball_y[2]~13\ = CARRY((\myVGA|ball_speed_y~1_combout\ & (\myVGA|ball_y\(2) & !\myVGA|ball_y[1]~11\)) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(2)) # (!\myVGA|ball_y[1]~11\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_y~1_combout\, + datab => \myVGA|ball_y\(2), + datad => VCC, + cin => \myVGA|ball_y[1]~11\, + combout => \myVGA|ball_y[2]~12_combout\, + cout => \myVGA|ball_y[2]~13\); + +-- Location: FF_X30_Y68_N19 +\myVGA|ball_y[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_y[2]~12_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_y\(2)); + +-- Location: LCCOMB_X30_Y68_N20 +\myVGA|ball_y[3]~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[3]~14_combout\ = (\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(3) & (!\myVGA|ball_y[2]~13\)) # (!\myVGA|ball_y\(3) & ((\myVGA|ball_y[2]~13\) # (GND))))) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(3) & (\myVGA|ball_y[2]~13\ & +-- VCC)) # (!\myVGA|ball_y\(3) & (!\myVGA|ball_y[2]~13\)))) +-- \myVGA|ball_y[3]~15\ = CARRY((\myVGA|ball_speed_y~1_combout\ & ((!\myVGA|ball_y[2]~13\) # (!\myVGA|ball_y\(3)))) # (!\myVGA|ball_speed_y~1_combout\ & (!\myVGA|ball_y\(3) & !\myVGA|ball_y[2]~13\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_y~1_combout\, + datab => \myVGA|ball_y\(3), + datad => VCC, + cin => \myVGA|ball_y[2]~13\, + combout => \myVGA|ball_y[3]~14_combout\, + cout => \myVGA|ball_y[3]~15\); + +-- Location: FF_X30_Y68_N21 +\myVGA|ball_y[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_y[3]~14_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_y\(3)); + +-- Location: LCCOMB_X30_Y68_N22 +\myVGA|ball_y[4]~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[4]~16_combout\ = ((\myVGA|ball_speed_y~1_combout\ $ (\myVGA|ball_y\(4) $ (\myVGA|ball_y[3]~15\)))) # (GND) +-- \myVGA|ball_y[4]~17\ = CARRY((\myVGA|ball_speed_y~1_combout\ & (\myVGA|ball_y\(4) & !\myVGA|ball_y[3]~15\)) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(4)) # (!\myVGA|ball_y[3]~15\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_y~1_combout\, + datab => \myVGA|ball_y\(4), + datad => VCC, + cin => \myVGA|ball_y[3]~15\, + combout => \myVGA|ball_y[4]~16_combout\, + cout => \myVGA|ball_y[4]~17\); + +-- Location: FF_X30_Y68_N23 +\myVGA|ball_y[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_y[4]~16_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_y\(4)); + +-- Location: LCCOMB_X30_Y68_N24 +\myVGA|ball_y[5]~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[5]~18_combout\ = (\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(5) & (!\myVGA|ball_y[4]~17\)) # (!\myVGA|ball_y\(5) & ((\myVGA|ball_y[4]~17\) # (GND))))) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(5) & (\myVGA|ball_y[4]~17\ & +-- VCC)) # (!\myVGA|ball_y\(5) & (!\myVGA|ball_y[4]~17\)))) +-- \myVGA|ball_y[5]~19\ = CARRY((\myVGA|ball_speed_y~1_combout\ & ((!\myVGA|ball_y[4]~17\) # (!\myVGA|ball_y\(5)))) # (!\myVGA|ball_speed_y~1_combout\ & (!\myVGA|ball_y\(5) & !\myVGA|ball_y[4]~17\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_y~1_combout\, + datab => \myVGA|ball_y\(5), + datad => VCC, + cin => \myVGA|ball_y[4]~17\, + combout => \myVGA|ball_y[5]~18_combout\, + cout => \myVGA|ball_y[5]~19\); + +-- Location: FF_X30_Y68_N25 +\myVGA|ball_y[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_y[5]~18_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_y\(5)); + +-- Location: LCCOMB_X30_Y68_N26 +\myVGA|ball_y[6]~20\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[6]~20_combout\ = ((\myVGA|ball_y\(6) $ (\myVGA|ball_speed_y~1_combout\ $ (\myVGA|ball_y[5]~19\)))) # (GND) +-- \myVGA|ball_y[6]~21\ = CARRY((\myVGA|ball_y\(6) & ((!\myVGA|ball_y[5]~19\) # (!\myVGA|ball_speed_y~1_combout\))) # (!\myVGA|ball_y\(6) & (!\myVGA|ball_speed_y~1_combout\ & !\myVGA|ball_y[5]~19\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(6), + datab => \myVGA|ball_speed_y~1_combout\, + datad => VCC, + cin => \myVGA|ball_y[5]~19\, + combout => \myVGA|ball_y[6]~20_combout\, + cout => \myVGA|ball_y[6]~21\); + +-- Location: FF_X30_Y68_N27 +\myVGA|ball_y[6]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_y[6]~20_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_y\(6)); + +-- Location: LCCOMB_X29_Y67_N0 +\myVGA|LessThan11~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan11~1_cout\ = CARRY((\myVGA|BALL_WIDTH\(0) & !\myVGA|ball_b\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000100010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(0), + datab => \myVGA|ball_b\(0), + datad => VCC, + cout => \myVGA|LessThan11~1_cout\); + +-- Location: LCCOMB_X29_Y67_N2 +\myVGA|LessThan11~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan11~3_cout\ = CARRY((\myVGA|BALL_WIDTH\(1) & ((\myVGA|ball_y\(1)) # (!\myVGA|LessThan11~1_cout\))) # (!\myVGA|BALL_WIDTH\(1) & (\myVGA|ball_y\(1) & !\myVGA|LessThan11~1_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000010001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(1), + datab => \myVGA|ball_y\(1), + datad => VCC, + cin => \myVGA|LessThan11~1_cout\, + cout => \myVGA|LessThan11~3_cout\); + +-- Location: LCCOMB_X29_Y67_N4 +\myVGA|LessThan11~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan11~5_cout\ = CARRY((\myVGA|BALL_WIDTH\(2) & ((!\myVGA|LessThan11~3_cout\) # (!\myVGA|ball_y\(2)))) # (!\myVGA|BALL_WIDTH\(2) & (!\myVGA|ball_y\(2) & !\myVGA|LessThan11~3_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(2), + datab => \myVGA|ball_y\(2), + datad => VCC, + cin => \myVGA|LessThan11~3_cout\, + cout => \myVGA|LessThan11~5_cout\); + +-- Location: LCCOMB_X29_Y67_N6 +\myVGA|LessThan11~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan11~7_cout\ = CARRY((\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3)) # (!\myVGA|LessThan11~5_cout\))) # (!\myVGA|ball_y\(3) & (\myVGA|BALL_WIDTH\(3) & !\myVGA|LessThan11~5_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000010001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(3), + datab => \myVGA|BALL_WIDTH\(3), + datad => VCC, + cin => \myVGA|LessThan11~5_cout\, + cout => \myVGA|LessThan11~7_cout\); + +-- Location: LCCOMB_X29_Y67_N8 +\myVGA|LessThan11~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan11~9_cout\ = CARRY((\myVGA|ball_y\(4) & (\myVGA|BALL_WIDTH\(4) & !\myVGA|LessThan11~7_cout\)) # (!\myVGA|ball_y\(4) & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|LessThan11~7_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(4), + datab => \myVGA|BALL_WIDTH\(4), + datad => VCC, + cin => \myVGA|LessThan11~7_cout\, + cout => \myVGA|LessThan11~9_cout\); + +-- Location: LCCOMB_X29_Y67_N10 +\myVGA|LessThan11~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan11~10_combout\ = (\myVGA|BALL_WIDTH\(5) & ((\myVGA|LessThan11~9_cout\) # (!\myVGA|ball_y\(5)))) # (!\myVGA|BALL_WIDTH\(5) & (!\myVGA|ball_y\(5) & \myVGA|LessThan11~9_cout\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1011001010110010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(5), + datab => \myVGA|ball_y\(5), + cin => \myVGA|LessThan11~9_cout\, + combout => \myVGA|LessThan11~10_combout\); + +-- Location: LCCOMB_X29_Y68_N6 +\myVGA|Add5~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add5~0_combout\ = (\myVGA|BALL_WIDTH\(1) & (\myVGA|BALL_WIDTH\(0) $ (GND))) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|BALL_WIDTH\(0) & VCC)) +-- \myVGA|Add5~1\ = CARRY((\myVGA|BALL_WIDTH\(1) & !\myVGA|BALL_WIDTH\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001100100100010", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(1), + datab => \myVGA|BALL_WIDTH\(0), + datad => VCC, + combout => \myVGA|Add5~0_combout\, + cout => \myVGA|Add5~1\); + +-- Location: LCCOMB_X29_Y68_N8 +\myVGA|Add5~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add5~2_combout\ = (\myVGA|BALL_WIDTH\(2) & ((\myVGA|Add5~1\) # (GND))) # (!\myVGA|BALL_WIDTH\(2) & (!\myVGA|Add5~1\)) +-- \myVGA|Add5~3\ = CARRY((\myVGA|BALL_WIDTH\(2)) # (!\myVGA|Add5~1\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001111001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(2), + datad => VCC, + cin => \myVGA|Add5~1\, + combout => \myVGA|Add5~2_combout\, + cout => \myVGA|Add5~3\); + +-- Location: LCCOMB_X29_Y68_N10 +\myVGA|Add5~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add5~4_combout\ = (\myVGA|BALL_WIDTH\(3) & (\myVGA|Add5~3\ $ (GND))) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add5~3\ & VCC)) +-- \myVGA|Add5~5\ = CARRY((\myVGA|BALL_WIDTH\(3) & !\myVGA|Add5~3\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(3), + datad => VCC, + cin => \myVGA|Add5~3\, + combout => \myVGA|Add5~4_combout\, + cout => \myVGA|Add5~5\); + +-- Location: LCCOMB_X29_Y68_N12 +\myVGA|Add5~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add5~6_combout\ = (\myVGA|BALL_WIDTH\(4) & ((\myVGA|Add5~5\) # (GND))) # (!\myVGA|BALL_WIDTH\(4) & (!\myVGA|Add5~5\)) +-- \myVGA|Add5~7\ = CARRY((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|Add5~5\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001111001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(4), + datad => VCC, + cin => \myVGA|Add5~5\, + combout => \myVGA|Add5~6_combout\, + cout => \myVGA|Add5~7\); + +-- Location: LCCOMB_X29_Y68_N14 +\myVGA|Add5~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add5~8_combout\ = (\myVGA|BALL_WIDTH\(5) & (\myVGA|Add5~7\ $ (GND))) # (!\myVGA|BALL_WIDTH\(5) & ((GND) # (!\myVGA|Add5~7\))) +-- \myVGA|Add5~9\ = CARRY((!\myVGA|Add5~7\) # (!\myVGA|BALL_WIDTH\(5))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|BALL_WIDTH\(5), + datad => VCC, + cin => \myVGA|Add5~7\, + combout => \myVGA|Add5~8_combout\, + cout => \myVGA|Add5~9\); + +-- Location: LCCOMB_X29_Y68_N16 +\myVGA|Add5~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add5~10_combout\ = !\myVGA|Add5~9\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111100001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + cin => \myVGA|Add5~9\, + combout => \myVGA|Add5~10_combout\); + +-- Location: LCCOMB_X29_Y68_N18 +\myVGA|LessThan9~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan9~1_cout\ = CARRY((!\myVGA|ball_b\(0) & \myVGA|BALL_WIDTH\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001000100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_b\(0), + datab => \myVGA|BALL_WIDTH\(0), + datad => VCC, + cout => \myVGA|LessThan9~1_cout\); + +-- Location: LCCOMB_X29_Y68_N20 +\myVGA|LessThan9~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan9~3_cout\ = CARRY((\myVGA|Add5~0_combout\ & (\myVGA|ball_y\(1) & !\myVGA|LessThan9~1_cout\)) # (!\myVGA|Add5~0_combout\ & ((\myVGA|ball_y\(1)) # (!\myVGA|LessThan9~1_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add5~0_combout\, + datab => \myVGA|ball_y\(1), + datad => VCC, + cin => \myVGA|LessThan9~1_cout\, + cout => \myVGA|LessThan9~3_cout\); + +-- Location: LCCOMB_X29_Y68_N22 +\myVGA|LessThan9~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan9~5_cout\ = CARRY((\myVGA|Add5~2_combout\ & ((!\myVGA|LessThan9~3_cout\) # (!\myVGA|ball_y\(2)))) # (!\myVGA|Add5~2_combout\ & (!\myVGA|ball_y\(2) & !\myVGA|LessThan9~3_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add5~2_combout\, + datab => \myVGA|ball_y\(2), + datad => VCC, + cin => \myVGA|LessThan9~3_cout\, + cout => \myVGA|LessThan9~5_cout\); + +-- Location: LCCOMB_X29_Y68_N24 +\myVGA|LessThan9~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan9~7_cout\ = CARRY((\myVGA|Add5~4_combout\ & (\myVGA|ball_y\(3) & !\myVGA|LessThan9~5_cout\)) # (!\myVGA|Add5~4_combout\ & ((\myVGA|ball_y\(3)) # (!\myVGA|LessThan9~5_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add5~4_combout\, + datab => \myVGA|ball_y\(3), + datad => VCC, + cin => \myVGA|LessThan9~5_cout\, + cout => \myVGA|LessThan9~7_cout\); + +-- Location: LCCOMB_X29_Y68_N26 +\myVGA|LessThan9~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan9~9_cout\ = CARRY((\myVGA|Add5~6_combout\ & ((!\myVGA|LessThan9~7_cout\) # (!\myVGA|ball_y\(4)))) # (!\myVGA|Add5~6_combout\ & (!\myVGA|ball_y\(4) & !\myVGA|LessThan9~7_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add5~6_combout\, + datab => \myVGA|ball_y\(4), + datad => VCC, + cin => \myVGA|LessThan9~7_cout\, + cout => \myVGA|LessThan9~9_cout\); + +-- Location: LCCOMB_X29_Y68_N28 +\myVGA|LessThan9~11\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan9~11_cout\ = CARRY((\myVGA|Add5~8_combout\ & (\myVGA|ball_y\(5) & !\myVGA|LessThan9~9_cout\)) # (!\myVGA|Add5~8_combout\ & ((\myVGA|ball_y\(5)) # (!\myVGA|LessThan9~9_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add5~8_combout\, + datab => \myVGA|ball_y\(5), + datad => VCC, + cin => \myVGA|LessThan9~9_cout\, + cout => \myVGA|LessThan9~11_cout\); + +-- Location: LCCOMB_X29_Y68_N30 +\myVGA|LessThan9~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan9~12_combout\ = (\myVGA|Add5~10_combout\ & (!\myVGA|LessThan9~11_cout\ & !\myVGA|ball_y\(6))) # (!\myVGA|Add5~10_combout\ & ((!\myVGA|ball_y\(6)) # (!\myVGA|LessThan9~11_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000001100111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|Add5~10_combout\, + datad => \myVGA|ball_y\(6), + cin => \myVGA|LessThan9~11_cout\, + combout => \myVGA|LessThan9~12_combout\); + +-- Location: LCCOMB_X30_Y68_N10 +\myVGA|ball_speed_y~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_speed_y~0_combout\ = (\myVGA|ball_y\(8) & (((\myVGA|LessThan9~12_combout\)))) # (!\myVGA|ball_y\(8) & (!\myVGA|ball_y\(6) & (\myVGA|LessThan11~10_combout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111010000000100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(6), + datab => \myVGA|LessThan11~10_combout\, + datac => \myVGA|ball_y\(8), + datad => \myVGA|LessThan9~12_combout\, + combout => \myVGA|ball_speed_y~0_combout\); + +-- Location: LCCOMB_X30_Y68_N0 +\myVGA|ball_bounce:ball_speed_y[1]~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_bounce:ball_speed_y[1]~0_combout\ = !\myVGA|ball_speed_y~1_combout\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000011111111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datad => \myVGA|ball_speed_y~1_combout\, + combout => \myVGA|ball_bounce:ball_speed_y[1]~0_combout\); + +-- Location: FF_X30_Y68_N1 +\myVGA|ball_bounce:ball_speed_y[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_bounce:ball_speed_y[1]~0_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_bounce:ball_speed_y[1]~q\); + +-- Location: LCCOMB_X30_Y68_N28 +\myVGA|ball_y[7]~22\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[7]~22_combout\ = (\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(7) & (!\myVGA|ball_y[6]~21\)) # (!\myVGA|ball_y\(7) & ((\myVGA|ball_y[6]~21\) # (GND))))) # (!\myVGA|ball_speed_y~1_combout\ & ((\myVGA|ball_y\(7) & (\myVGA|ball_y[6]~21\ & +-- VCC)) # (!\myVGA|ball_y\(7) & (!\myVGA|ball_y[6]~21\)))) +-- \myVGA|ball_y[7]~23\ = CARRY((\myVGA|ball_speed_y~1_combout\ & ((!\myVGA|ball_y[6]~21\) # (!\myVGA|ball_y\(7)))) # (!\myVGA|ball_speed_y~1_combout\ & (!\myVGA|ball_y\(7) & !\myVGA|ball_y[6]~21\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_y~1_combout\, + datab => \myVGA|ball_y\(7), + datad => VCC, + cin => \myVGA|ball_y[6]~21\, + combout => \myVGA|ball_y[7]~22_combout\, + cout => \myVGA|ball_y[7]~23\); + +-- Location: FF_X30_Y68_N29 +\myVGA|ball_y[7]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_y[7]~22_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_y\(7)); + +-- Location: LCCOMB_X30_Y68_N12 +\myVGA|ball_speed_y~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_speed_y~1_combout\ = (\myVGA|ball_speed_y~0_combout\ & (((!\myVGA|ball_y\(8) & !\myVGA|ball_y\(7))) # (!\myVGA|ball_bounce:ball_speed_y[1]~q\))) # (!\myVGA|ball_speed_y~0_combout\ & (\myVGA|ball_bounce:ball_speed_y[1]~q\ $ +-- (((!\myVGA|ball_y\(7)) # (!\myVGA|ball_y\(8)))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110001100111011", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_speed_y~0_combout\, + datab => \myVGA|ball_bounce:ball_speed_y[1]~q\, + datac => \myVGA|ball_y\(8), + datad => \myVGA|ball_y\(7), + combout => \myVGA|ball_speed_y~1_combout\); + +-- Location: LCCOMB_X30_Y68_N30 +\myVGA|ball_y[8]~24\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_y[8]~24_combout\ = \myVGA|ball_y\(8) $ (\myVGA|ball_y[7]~23\ $ (\myVGA|ball_speed_y~1_combout\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010101011010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(8), + datad => \myVGA|ball_speed_y~1_combout\, + cin => \myVGA|ball_y[7]~23\, + combout => \myVGA|ball_y[8]~24_combout\); + +-- Location: FF_X30_Y68_N31 +\myVGA|ball_y[8]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_y[8]~24_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_y\(8)); + +-- Location: LCCOMB_X29_Y67_N12 +\myVGA|Add16~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~0_combout\ = (\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) $ (VCC))) # (!\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) & VCC)) +-- \myVGA|Add16~1\ = CARRY((\myVGA|BALL_WIDTH\(0) & \myVGA|ball_b\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110011010001000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(0), + datab => \myVGA|ball_b\(0), + datad => VCC, + combout => \myVGA|Add16~0_combout\, + cout => \myVGA|Add16~1\); + +-- Location: LCCOMB_X29_Y67_N14 +\myVGA|Add16~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~2_combout\ = (\myVGA|BALL_WIDTH\(1) & ((\myVGA|ball_y\(1) & (!\myVGA|Add16~1\)) # (!\myVGA|ball_y\(1) & ((\myVGA|Add16~1\) # (GND))))) # (!\myVGA|BALL_WIDTH\(1) & ((\myVGA|ball_y\(1) & (\myVGA|Add16~1\ & VCC)) # (!\myVGA|ball_y\(1) & +-- (!\myVGA|Add16~1\)))) +-- \myVGA|Add16~3\ = CARRY((\myVGA|BALL_WIDTH\(1) & ((!\myVGA|Add16~1\) # (!\myVGA|ball_y\(1)))) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|ball_y\(1) & !\myVGA|Add16~1\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100100101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(1), + datab => \myVGA|ball_y\(1), + datad => VCC, + cin => \myVGA|Add16~1\, + combout => \myVGA|Add16~2_combout\, + cout => \myVGA|Add16~3\); + +-- Location: LCCOMB_X29_Y67_N16 +\myVGA|Add16~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~4_combout\ = ((\myVGA|BALL_WIDTH\(2) $ (\myVGA|ball_y\(2) $ (!\myVGA|Add16~3\)))) # (GND) +-- \myVGA|Add16~5\ = CARRY((\myVGA|BALL_WIDTH\(2) & ((\myVGA|ball_y\(2)) # (!\myVGA|Add16~3\))) # (!\myVGA|BALL_WIDTH\(2) & (\myVGA|ball_y\(2) & !\myVGA|Add16~3\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100110001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(2), + datab => \myVGA|ball_y\(2), + datad => VCC, + cin => \myVGA|Add16~3\, + combout => \myVGA|Add16~4_combout\, + cout => \myVGA|Add16~5\); + +-- Location: LCCOMB_X29_Y67_N18 +\myVGA|Add16~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~6_combout\ = (\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add16~5\)) # (!\myVGA|BALL_WIDTH\(3) & (\myVGA|Add16~5\ & VCC)))) # (!\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3) & ((\myVGA|Add16~5\) # (GND))) # (!\myVGA|BALL_WIDTH\(3) & +-- (!\myVGA|Add16~5\)))) +-- \myVGA|Add16~7\ = CARRY((\myVGA|ball_y\(3) & (\myVGA|BALL_WIDTH\(3) & !\myVGA|Add16~5\)) # (!\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3)) # (!\myVGA|Add16~5\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100101001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(3), + datab => \myVGA|BALL_WIDTH\(3), + datad => VCC, + cin => \myVGA|Add16~5\, + combout => \myVGA|Add16~6_combout\, + cout => \myVGA|Add16~7\); + +-- Location: LCCOMB_X29_Y67_N20 +\myVGA|Add16~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~8_combout\ = ((\myVGA|ball_y\(4) $ (\myVGA|BALL_WIDTH\(4) $ (!\myVGA|Add16~7\)))) # (GND) +-- \myVGA|Add16~9\ = CARRY((\myVGA|ball_y\(4) & ((\myVGA|BALL_WIDTH\(4)) # (!\myVGA|Add16~7\))) # (!\myVGA|ball_y\(4) & (\myVGA|BALL_WIDTH\(4) & !\myVGA|Add16~7\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100110001110", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(4), + datab => \myVGA|BALL_WIDTH\(4), + datad => VCC, + cin => \myVGA|Add16~7\, + combout => \myVGA|Add16~8_combout\, + cout => \myVGA|Add16~9\); + +-- Location: LCCOMB_X29_Y67_N22 +\myVGA|Add16~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~10_combout\ = (\myVGA|BALL_WIDTH\(5) & ((\myVGA|ball_y\(5) & (\myVGA|Add16~9\ & VCC)) # (!\myVGA|ball_y\(5) & (!\myVGA|Add16~9\)))) # (!\myVGA|BALL_WIDTH\(5) & ((\myVGA|ball_y\(5) & (!\myVGA|Add16~9\)) # (!\myVGA|ball_y\(5) & +-- ((\myVGA|Add16~9\) # (GND))))) +-- \myVGA|Add16~11\ = CARRY((\myVGA|BALL_WIDTH\(5) & (!\myVGA|ball_y\(5) & !\myVGA|Add16~9\)) # (!\myVGA|BALL_WIDTH\(5) & ((!\myVGA|Add16~9\) # (!\myVGA|ball_y\(5))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000010111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(5), + datab => \myVGA|ball_y\(5), + datad => VCC, + cin => \myVGA|Add16~9\, + combout => \myVGA|Add16~10_combout\, + cout => \myVGA|Add16~11\); + +-- Location: LCCOMB_X29_Y67_N24 +\myVGA|Add16~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~12_combout\ = (\myVGA|ball_y\(6) & (\myVGA|Add16~11\ $ (GND))) # (!\myVGA|ball_y\(6) & (!\myVGA|Add16~11\ & VCC)) +-- \myVGA|Add16~13\ = CARRY((\myVGA|ball_y\(6) & !\myVGA|Add16~11\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_y\(6), + datad => VCC, + cin => \myVGA|Add16~11\, + combout => \myVGA|Add16~12_combout\, + cout => \myVGA|Add16~13\); + +-- Location: LCCOMB_X29_Y67_N26 +\myVGA|Add16~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~14_combout\ = (\myVGA|ball_y\(7) & (!\myVGA|Add16~13\)) # (!\myVGA|ball_y\(7) & ((\myVGA|Add16~13\) # (GND))) +-- \myVGA|Add16~15\ = CARRY((!\myVGA|Add16~13\) # (!\myVGA|ball_y\(7))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_y\(7), + datad => VCC, + cin => \myVGA|Add16~13\, + combout => \myVGA|Add16~14_combout\, + cout => \myVGA|Add16~15\); + +-- Location: LCCOMB_X29_Y67_N28 +\myVGA|Add16~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~16_combout\ = (\myVGA|ball_y\(8) & (\myVGA|Add16~15\ $ (GND))) # (!\myVGA|ball_y\(8) & (!\myVGA|Add16~15\ & VCC)) +-- \myVGA|Add16~17\ = CARRY((\myVGA|ball_y\(8) & !\myVGA|Add16~15\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_y\(8), + datad => VCC, + cin => \myVGA|Add16~15\, + combout => \myVGA|Add16~16_combout\, + cout => \myVGA|Add16~17\); + +-- Location: LCCOMB_X29_Y67_N30 +\myVGA|Add16~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add16~18_combout\ = \myVGA|Add16~17\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111000011110000", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + cin => \myVGA|Add16~17\, + combout => \myVGA|Add16~18_combout\); + +-- Location: LCCOMB_X28_Y67_N0 +\myVGA|LessThan14~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~1_cout\ = CARRY((!\myVGA|v_px_count\(0) & \myVGA|Add16~0_combout\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001000100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(0), + datab => \myVGA|Add16~0_combout\, + datad => VCC, + cout => \myVGA|LessThan14~1_cout\); + +-- Location: LCCOMB_X28_Y67_N2 +\myVGA|LessThan14~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~3_cout\ = CARRY((\myVGA|v_px_count\(1) & ((!\myVGA|LessThan14~1_cout\) # (!\myVGA|Add16~2_combout\))) # (!\myVGA|v_px_count\(1) & (!\myVGA|Add16~2_combout\ & !\myVGA|LessThan14~1_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(1), + datab => \myVGA|Add16~2_combout\, + datad => VCC, + cin => \myVGA|LessThan14~1_cout\, + cout => \myVGA|LessThan14~3_cout\); + +-- Location: LCCOMB_X28_Y67_N4 +\myVGA|LessThan14~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~5_cout\ = CARRY((\myVGA|Add16~4_combout\ & ((!\myVGA|LessThan14~3_cout\) # (!\myVGA|v_px_count\(2)))) # (!\myVGA|Add16~4_combout\ & (!\myVGA|v_px_count\(2) & !\myVGA|LessThan14~3_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add16~4_combout\, + datab => \myVGA|v_px_count\(2), + datad => VCC, + cin => \myVGA|LessThan14~3_cout\, + cout => \myVGA|LessThan14~5_cout\); + +-- Location: LCCOMB_X28_Y67_N6 +\myVGA|LessThan14~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~7_cout\ = CARRY((\myVGA|v_px_count\(3) & ((!\myVGA|LessThan14~5_cout\) # (!\myVGA|Add16~6_combout\))) # (!\myVGA|v_px_count\(3) & (!\myVGA|Add16~6_combout\ & !\myVGA|LessThan14~5_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(3), + datab => \myVGA|Add16~6_combout\, + datad => VCC, + cin => \myVGA|LessThan14~5_cout\, + cout => \myVGA|LessThan14~7_cout\); + +-- Location: LCCOMB_X28_Y67_N8 +\myVGA|LessThan14~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~9_cout\ = CARRY((\myVGA|Add16~8_combout\ & ((!\myVGA|LessThan14~7_cout\) # (!\myVGA|v_px_count\(4)))) # (!\myVGA|Add16~8_combout\ & (!\myVGA|v_px_count\(4) & !\myVGA|LessThan14~7_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add16~8_combout\, + datab => \myVGA|v_px_count\(4), + datad => VCC, + cin => \myVGA|LessThan14~7_cout\, + cout => \myVGA|LessThan14~9_cout\); + +-- Location: LCCOMB_X28_Y67_N10 +\myVGA|LessThan14~11\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~11_cout\ = CARRY((\myVGA|v_px_count\(5) & ((!\myVGA|LessThan14~9_cout\) # (!\myVGA|Add16~10_combout\))) # (!\myVGA|v_px_count\(5) & (!\myVGA|Add16~10_combout\ & !\myVGA|LessThan14~9_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(5), + datab => \myVGA|Add16~10_combout\, + datad => VCC, + cin => \myVGA|LessThan14~9_cout\, + cout => \myVGA|LessThan14~11_cout\); + +-- Location: LCCOMB_X28_Y67_N12 +\myVGA|LessThan14~13\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~13_cout\ = CARRY((\myVGA|v_px_count\(6) & (\myVGA|Add16~12_combout\ & !\myVGA|LessThan14~11_cout\)) # (!\myVGA|v_px_count\(6) & ((\myVGA|Add16~12_combout\) # (!\myVGA|LessThan14~11_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(6), + datab => \myVGA|Add16~12_combout\, + datad => VCC, + cin => \myVGA|LessThan14~11_cout\, + cout => \myVGA|LessThan14~13_cout\); + +-- Location: LCCOMB_X28_Y67_N14 +\myVGA|LessThan14~15\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~15_cout\ = CARRY((\myVGA|v_px_count\(7) & ((!\myVGA|LessThan14~13_cout\) # (!\myVGA|Add16~14_combout\))) # (!\myVGA|v_px_count\(7) & (!\myVGA|Add16~14_combout\ & !\myVGA|LessThan14~13_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(7), + datab => \myVGA|Add16~14_combout\, + datad => VCC, + cin => \myVGA|LessThan14~13_cout\, + cout => \myVGA|LessThan14~15_cout\); + +-- Location: LCCOMB_X28_Y67_N16 +\myVGA|LessThan14~17\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~17_cout\ = CARRY((\myVGA|v_px_count\(8) & (\myVGA|Add16~16_combout\ & !\myVGA|LessThan14~15_cout\)) # (!\myVGA|v_px_count\(8) & ((\myVGA|Add16~16_combout\) # (!\myVGA|LessThan14~15_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(8), + datab => \myVGA|Add16~16_combout\, + datad => VCC, + cin => \myVGA|LessThan14~15_cout\, + cout => \myVGA|LessThan14~17_cout\); + +-- Location: LCCOMB_X28_Y67_N18 +\myVGA|LessThan14~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan14~18_combout\ = (\myVGA|Add16~18_combout\ & ((\myVGA|LessThan14~17_cout\) # (!\myVGA|v_px_count\(9)))) # (!\myVGA|Add16~18_combout\ & (\myVGA|LessThan14~17_cout\ & !\myVGA|v_px_count\(9))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010000011111010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add16~18_combout\, + datad => \myVGA|v_px_count\(9), + cin => \myVGA|LessThan14~17_cout\, + combout => \myVGA|LessThan14~18_combout\); + +-- Location: LCCOMB_X32_Y67_N30 +\myVGA|Add14~20\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add14~20_combout\ = !\myVGA|Add14~19\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111100001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + cin => \myVGA|Add14~19\, + combout => \myVGA|Add14~20_combout\); + +-- Location: LCCOMB_X32_Y68_N4 +\myVGA|Add15~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~0_combout\ = (\myVGA|ball_b\(0) & ((GND) # (!\myVGA|BALL_WIDTH\(0)))) # (!\myVGA|ball_b\(0) & (\myVGA|BALL_WIDTH\(0) $ (GND))) +-- \myVGA|Add15~1\ = CARRY((\myVGA|ball_b\(0)) # (!\myVGA|BALL_WIDTH\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110011010111011", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_b\(0), + datab => \myVGA|BALL_WIDTH\(0), + datad => VCC, + combout => \myVGA|Add15~0_combout\, + cout => \myVGA|Add15~1\); + +-- Location: LCCOMB_X32_Y68_N6 +\myVGA|Add15~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~2_combout\ = (\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1) & (\myVGA|Add15~1\ & VCC)) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add15~1\)))) # (!\myVGA|ball_x\(1) & ((\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add15~1\)) # (!\myVGA|BALL_WIDTH\(1) & +-- ((\myVGA|Add15~1\) # (GND))))) +-- \myVGA|Add15~3\ = CARRY((\myVGA|ball_x\(1) & (!\myVGA|BALL_WIDTH\(1) & !\myVGA|Add15~1\)) # (!\myVGA|ball_x\(1) & ((!\myVGA|Add15~1\) # (!\myVGA|BALL_WIDTH\(1))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000010111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(1), + datab => \myVGA|BALL_WIDTH\(1), + datad => VCC, + cin => \myVGA|Add15~1\, + combout => \myVGA|Add15~2_combout\, + cout => \myVGA|Add15~3\); + +-- Location: LCCOMB_X32_Y68_N8 +\myVGA|Add15~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~4_combout\ = ((\myVGA|ball_x\(2) $ (\myVGA|BALL_WIDTH\(2) $ (\myVGA|Add15~3\)))) # (GND) +-- \myVGA|Add15~5\ = CARRY((\myVGA|ball_x\(2) & ((!\myVGA|Add15~3\) # (!\myVGA|BALL_WIDTH\(2)))) # (!\myVGA|ball_x\(2) & (!\myVGA|BALL_WIDTH\(2) & !\myVGA|Add15~3\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(2), + datab => \myVGA|BALL_WIDTH\(2), + datad => VCC, + cin => \myVGA|Add15~3\, + combout => \myVGA|Add15~4_combout\, + cout => \myVGA|Add15~5\); + +-- Location: LCCOMB_X32_Y68_N10 +\myVGA|Add15~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~6_combout\ = (\myVGA|ball_x\(3) & ((\myVGA|BALL_WIDTH\(3) & (\myVGA|Add15~5\ & VCC)) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add15~5\)))) # (!\myVGA|ball_x\(3) & ((\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add15~5\)) # (!\myVGA|BALL_WIDTH\(3) & +-- ((\myVGA|Add15~5\) # (GND))))) +-- \myVGA|Add15~7\ = CARRY((\myVGA|ball_x\(3) & (!\myVGA|BALL_WIDTH\(3) & !\myVGA|Add15~5\)) # (!\myVGA|ball_x\(3) & ((!\myVGA|Add15~5\) # (!\myVGA|BALL_WIDTH\(3))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000010111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(3), + datab => \myVGA|BALL_WIDTH\(3), + datad => VCC, + cin => \myVGA|Add15~5\, + combout => \myVGA|Add15~6_combout\, + cout => \myVGA|Add15~7\); + +-- Location: LCCOMB_X32_Y68_N12 +\myVGA|Add15~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~8_combout\ = ((\myVGA|ball_x\(4) $ (\myVGA|BALL_WIDTH\(4) $ (\myVGA|Add15~7\)))) # (GND) +-- \myVGA|Add15~9\ = CARRY((\myVGA|ball_x\(4) & ((!\myVGA|Add15~7\) # (!\myVGA|BALL_WIDTH\(4)))) # (!\myVGA|ball_x\(4) & (!\myVGA|BALL_WIDTH\(4) & !\myVGA|Add15~7\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(4), + datab => \myVGA|BALL_WIDTH\(4), + datad => VCC, + cin => \myVGA|Add15~7\, + combout => \myVGA|Add15~8_combout\, + cout => \myVGA|Add15~9\); + +-- Location: LCCOMB_X32_Y68_N14 +\myVGA|Add15~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~10_combout\ = (\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add15~9\)) # (!\myVGA|BALL_WIDTH\(5) & (\myVGA|Add15~9\ & VCC)))) # (!\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5) & ((\myVGA|Add15~9\) # (GND))) # (!\myVGA|BALL_WIDTH\(5) & +-- (!\myVGA|Add15~9\)))) +-- \myVGA|Add15~11\ = CARRY((\myVGA|ball_x\(5) & (\myVGA|BALL_WIDTH\(5) & !\myVGA|Add15~9\)) # (!\myVGA|ball_x\(5) & ((\myVGA|BALL_WIDTH\(5)) # (!\myVGA|Add15~9\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100101001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(5), + datab => \myVGA|BALL_WIDTH\(5), + datad => VCC, + cin => \myVGA|Add15~9\, + combout => \myVGA|Add15~10_combout\, + cout => \myVGA|Add15~11\); + +-- Location: LCCOMB_X32_Y68_N16 +\myVGA|Add15~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~12_combout\ = (\myVGA|ball_x\(6) & ((GND) # (!\myVGA|Add15~11\))) # (!\myVGA|ball_x\(6) & (\myVGA|Add15~11\ $ (GND))) +-- \myVGA|Add15~13\ = CARRY((\myVGA|ball_x\(6)) # (!\myVGA|Add15~11\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110011001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_x\(6), + datad => VCC, + cin => \myVGA|Add15~11\, + combout => \myVGA|Add15~12_combout\, + cout => \myVGA|Add15~13\); + +-- Location: LCCOMB_X32_Y68_N18 +\myVGA|Add15~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~14_combout\ = (\myVGA|ball_x\(7) & (\myVGA|Add15~13\ & VCC)) # (!\myVGA|ball_x\(7) & (!\myVGA|Add15~13\)) +-- \myVGA|Add15~15\ = CARRY((!\myVGA|ball_x\(7) & !\myVGA|Add15~13\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100000011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_x\(7), + datad => VCC, + cin => \myVGA|Add15~13\, + combout => \myVGA|Add15~14_combout\, + cout => \myVGA|Add15~15\); + +-- Location: LCCOMB_X32_Y68_N20 +\myVGA|Add15~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~16_combout\ = (\myVGA|ball_x\(8) & ((GND) # (!\myVGA|Add15~15\))) # (!\myVGA|ball_x\(8) & (\myVGA|Add15~15\ $ (GND))) +-- \myVGA|Add15~17\ = CARRY((\myVGA|ball_x\(8)) # (!\myVGA|Add15~15\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110011001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_x\(8), + datad => VCC, + cin => \myVGA|Add15~15\, + combout => \myVGA|Add15~16_combout\, + cout => \myVGA|Add15~17\); + +-- Location: LCCOMB_X32_Y68_N22 +\myVGA|Add15~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~18_combout\ = (\myVGA|ball_x\(9) & (\myVGA|Add15~17\ & VCC)) # (!\myVGA|ball_x\(9) & (!\myVGA|Add15~17\)) +-- \myVGA|Add15~19\ = CARRY((!\myVGA|ball_x\(9) & !\myVGA|Add15~17\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100000101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_x\(9), + datad => VCC, + cin => \myVGA|Add15~17\, + combout => \myVGA|Add15~18_combout\, + cout => \myVGA|Add15~19\); + +-- Location: LCCOMB_X33_Y68_N6 +\myVGA|LessThan13~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~1_cout\ = CARRY((\myVGA|Add15~0_combout\ & !\myVGA|h_px_count\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000100010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add15~0_combout\, + datab => \myVGA|h_px_count\(0), + datad => VCC, + cout => \myVGA|LessThan13~1_cout\); + +-- Location: LCCOMB_X33_Y68_N8 +\myVGA|LessThan13~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~3_cout\ = CARRY((\myVGA|h_px_count\(1) & ((!\myVGA|LessThan13~1_cout\) # (!\myVGA|Add15~2_combout\))) # (!\myVGA|h_px_count\(1) & (!\myVGA|Add15~2_combout\ & !\myVGA|LessThan13~1_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(1), + datab => \myVGA|Add15~2_combout\, + datad => VCC, + cin => \myVGA|LessThan13~1_cout\, + cout => \myVGA|LessThan13~3_cout\); + +-- Location: LCCOMB_X33_Y68_N10 +\myVGA|LessThan13~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~5_cout\ = CARRY((\myVGA|Add15~4_combout\ & ((!\myVGA|LessThan13~3_cout\) # (!\myVGA|h_px_count\(2)))) # (!\myVGA|Add15~4_combout\ & (!\myVGA|h_px_count\(2) & !\myVGA|LessThan13~3_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add15~4_combout\, + datab => \myVGA|h_px_count\(2), + datad => VCC, + cin => \myVGA|LessThan13~3_cout\, + cout => \myVGA|LessThan13~5_cout\); + +-- Location: LCCOMB_X33_Y68_N12 +\myVGA|LessThan13~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~7_cout\ = CARRY((\myVGA|Add15~6_combout\ & (\myVGA|h_px_count\(3) & !\myVGA|LessThan13~5_cout\)) # (!\myVGA|Add15~6_combout\ & ((\myVGA|h_px_count\(3)) # (!\myVGA|LessThan13~5_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add15~6_combout\, + datab => \myVGA|h_px_count\(3), + datad => VCC, + cin => \myVGA|LessThan13~5_cout\, + cout => \myVGA|LessThan13~7_cout\); + +-- Location: LCCOMB_X33_Y68_N14 +\myVGA|LessThan13~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~9_cout\ = CARRY((\myVGA|h_px_count\(4) & (\myVGA|Add15~8_combout\ & !\myVGA|LessThan13~7_cout\)) # (!\myVGA|h_px_count\(4) & ((\myVGA|Add15~8_combout\) # (!\myVGA|LessThan13~7_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(4), + datab => \myVGA|Add15~8_combout\, + datad => VCC, + cin => \myVGA|LessThan13~7_cout\, + cout => \myVGA|LessThan13~9_cout\); + +-- Location: LCCOMB_X33_Y68_N16 +\myVGA|LessThan13~11\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~11_cout\ = CARRY((\myVGA|Add15~10_combout\ & (\myVGA|h_px_count\(5) & !\myVGA|LessThan13~9_cout\)) # (!\myVGA|Add15~10_combout\ & ((\myVGA|h_px_count\(5)) # (!\myVGA|LessThan13~9_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add15~10_combout\, + datab => \myVGA|h_px_count\(5), + datad => VCC, + cin => \myVGA|LessThan13~9_cout\, + cout => \myVGA|LessThan13~11_cout\); + +-- Location: LCCOMB_X33_Y68_N18 +\myVGA|LessThan13~13\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~13_cout\ = CARRY((\myVGA|Add15~12_combout\ & ((!\myVGA|LessThan13~11_cout\) # (!\myVGA|h_px_count\(6)))) # (!\myVGA|Add15~12_combout\ & (!\myVGA|h_px_count\(6) & !\myVGA|LessThan13~11_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add15~12_combout\, + datab => \myVGA|h_px_count\(6), + datad => VCC, + cin => \myVGA|LessThan13~11_cout\, + cout => \myVGA|LessThan13~13_cout\); + +-- Location: LCCOMB_X33_Y68_N20 +\myVGA|LessThan13~15\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~15_cout\ = CARRY((\myVGA|Add15~14_combout\ & (\myVGA|h_px_count\(7) & !\myVGA|LessThan13~13_cout\)) # (!\myVGA|Add15~14_combout\ & ((\myVGA|h_px_count\(7)) # (!\myVGA|LessThan13~13_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add15~14_combout\, + datab => \myVGA|h_px_count\(7), + datad => VCC, + cin => \myVGA|LessThan13~13_cout\, + cout => \myVGA|LessThan13~15_cout\); + +-- Location: LCCOMB_X33_Y68_N22 +\myVGA|LessThan13~17\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~17_cout\ = CARRY((\myVGA|Add15~16_combout\ & ((!\myVGA|LessThan13~15_cout\) # (!\myVGA|h_px_count\(8)))) # (!\myVGA|Add15~16_combout\ & (!\myVGA|h_px_count\(8) & !\myVGA|LessThan13~15_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add15~16_combout\, + datab => \myVGA|h_px_count\(8), + datad => VCC, + cin => \myVGA|LessThan13~15_cout\, + cout => \myVGA|LessThan13~17_cout\); + +-- Location: LCCOMB_X33_Y68_N24 +\myVGA|LessThan13~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan13~18_combout\ = (\myVGA|Add15~18_combout\ & ((\myVGA|LessThan13~17_cout\) # (!\myVGA|h_px_count\(9)))) # (!\myVGA|Add15~18_combout\ & (\myVGA|LessThan13~17_cout\ & !\myVGA|h_px_count\(9))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100000011111100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|Add15~18_combout\, + datad => \myVGA|h_px_count\(9), + cin => \myVGA|LessThan13~17_cout\, + combout => \myVGA|LessThan13~18_combout\); + +-- Location: LCCOMB_X30_Y67_N0 +\myVGA|Add17~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~0_combout\ = (\myVGA|BALL_WIDTH\(0) & (\myVGA|ball_b\(0) $ (VCC))) # (!\myVGA|BALL_WIDTH\(0) & ((\myVGA|ball_b\(0)) # (GND))) +-- \myVGA|Add17~1\ = CARRY((\myVGA|ball_b\(0)) # (!\myVGA|BALL_WIDTH\(0))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110011011011101", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|BALL_WIDTH\(0), + datab => \myVGA|ball_b\(0), + datad => VCC, + combout => \myVGA|Add17~0_combout\, + cout => \myVGA|Add17~1\); + +-- Location: LCCOMB_X30_Y67_N2 +\myVGA|Add17~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~2_combout\ = (\myVGA|ball_y\(1) & ((\myVGA|BALL_WIDTH\(1) & (\myVGA|Add17~1\ & VCC)) # (!\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add17~1\)))) # (!\myVGA|ball_y\(1) & ((\myVGA|BALL_WIDTH\(1) & (!\myVGA|Add17~1\)) # (!\myVGA|BALL_WIDTH\(1) & +-- ((\myVGA|Add17~1\) # (GND))))) +-- \myVGA|Add17~3\ = CARRY((\myVGA|ball_y\(1) & (!\myVGA|BALL_WIDTH\(1) & !\myVGA|Add17~1\)) # (!\myVGA|ball_y\(1) & ((!\myVGA|Add17~1\) # (!\myVGA|BALL_WIDTH\(1))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000010111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(1), + datab => \myVGA|BALL_WIDTH\(1), + datad => VCC, + cin => \myVGA|Add17~1\, + combout => \myVGA|Add17~2_combout\, + cout => \myVGA|Add17~3\); + +-- Location: LCCOMB_X30_Y67_N4 +\myVGA|Add17~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~4_combout\ = ((\myVGA|ball_y\(2) $ (\myVGA|BALL_WIDTH\(2) $ (\myVGA|Add17~3\)))) # (GND) +-- \myVGA|Add17~5\ = CARRY((\myVGA|ball_y\(2) & ((!\myVGA|Add17~3\) # (!\myVGA|BALL_WIDTH\(2)))) # (!\myVGA|ball_y\(2) & (!\myVGA|BALL_WIDTH\(2) & !\myVGA|Add17~3\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(2), + datab => \myVGA|BALL_WIDTH\(2), + datad => VCC, + cin => \myVGA|Add17~3\, + combout => \myVGA|Add17~4_combout\, + cout => \myVGA|Add17~5\); + +-- Location: LCCOMB_X30_Y67_N6 +\myVGA|Add17~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~6_combout\ = (\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3) & (\myVGA|Add17~5\ & VCC)) # (!\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add17~5\)))) # (!\myVGA|ball_y\(3) & ((\myVGA|BALL_WIDTH\(3) & (!\myVGA|Add17~5\)) # (!\myVGA|BALL_WIDTH\(3) & +-- ((\myVGA|Add17~5\) # (GND))))) +-- \myVGA|Add17~7\ = CARRY((\myVGA|ball_y\(3) & (!\myVGA|BALL_WIDTH\(3) & !\myVGA|Add17~5\)) # (!\myVGA|ball_y\(3) & ((!\myVGA|Add17~5\) # (!\myVGA|BALL_WIDTH\(3))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000010111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(3), + datab => \myVGA|BALL_WIDTH\(3), + datad => VCC, + cin => \myVGA|Add17~5\, + combout => \myVGA|Add17~6_combout\, + cout => \myVGA|Add17~7\); + +-- Location: LCCOMB_X30_Y67_N8 +\myVGA|Add17~8\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~8_combout\ = ((\myVGA|ball_y\(4) $ (\myVGA|BALL_WIDTH\(4) $ (\myVGA|Add17~7\)))) # (GND) +-- \myVGA|Add17~9\ = CARRY((\myVGA|ball_y\(4) & ((!\myVGA|Add17~7\) # (!\myVGA|BALL_WIDTH\(4)))) # (!\myVGA|ball_y\(4) & (!\myVGA|BALL_WIDTH\(4) & !\myVGA|Add17~7\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1001011000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(4), + datab => \myVGA|BALL_WIDTH\(4), + datad => VCC, + cin => \myVGA|Add17~7\, + combout => \myVGA|Add17~8_combout\, + cout => \myVGA|Add17~9\); + +-- Location: LCCOMB_X30_Y67_N10 +\myVGA|Add17~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~10_combout\ = (\myVGA|ball_y\(5) & ((\myVGA|BALL_WIDTH\(5) & (!\myVGA|Add17~9\)) # (!\myVGA|BALL_WIDTH\(5) & (\myVGA|Add17~9\ & VCC)))) # (!\myVGA|ball_y\(5) & ((\myVGA|BALL_WIDTH\(5) & ((\myVGA|Add17~9\) # (GND))) # (!\myVGA|BALL_WIDTH\(5) & +-- (!\myVGA|Add17~9\)))) +-- \myVGA|Add17~11\ = CARRY((\myVGA|ball_y\(5) & (\myVGA|BALL_WIDTH\(5) & !\myVGA|Add17~9\)) # (!\myVGA|ball_y\(5) & ((\myVGA|BALL_WIDTH\(5)) # (!\myVGA|Add17~9\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110100101001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(5), + datab => \myVGA|BALL_WIDTH\(5), + datad => VCC, + cin => \myVGA|Add17~9\, + combout => \myVGA|Add17~10_combout\, + cout => \myVGA|Add17~11\); + +-- Location: LCCOMB_X30_Y67_N12 +\myVGA|Add17~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~12_combout\ = (\myVGA|ball_y\(6) & ((GND) # (!\myVGA|Add17~11\))) # (!\myVGA|ball_y\(6) & (\myVGA|Add17~11\ $ (GND))) +-- \myVGA|Add17~13\ = CARRY((\myVGA|ball_y\(6)) # (!\myVGA|Add17~11\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110011001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_y\(6), + datad => VCC, + cin => \myVGA|Add17~11\, + combout => \myVGA|Add17~12_combout\, + cout => \myVGA|Add17~13\); + +-- Location: LCCOMB_X30_Y67_N14 +\myVGA|Add17~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~14_combout\ = (\myVGA|ball_y\(7) & (\myVGA|Add17~13\ & VCC)) # (!\myVGA|ball_y\(7) & (!\myVGA|Add17~13\)) +-- \myVGA|Add17~15\ = CARRY((!\myVGA|ball_y\(7) & !\myVGA|Add17~13\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100000101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(7), + datad => VCC, + cin => \myVGA|Add17~13\, + combout => \myVGA|Add17~14_combout\, + cout => \myVGA|Add17~15\); + +-- Location: LCCOMB_X30_Y67_N16 +\myVGA|Add17~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~16_combout\ = (\myVGA|ball_y\(8) & ((GND) # (!\myVGA|Add17~15\))) # (!\myVGA|ball_y\(8) & (\myVGA|Add17~15\ $ (GND))) +-- \myVGA|Add17~17\ = CARRY((\myVGA|ball_y\(8)) # (!\myVGA|Add17~15\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101010101111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_y\(8), + datad => VCC, + cin => \myVGA|Add17~15\, + combout => \myVGA|Add17~16_combout\, + cout => \myVGA|Add17~17\); + +-- Location: LCCOMB_X30_Y67_N18 +\myVGA|Add17~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add17~18_combout\ = !\myVGA|Add17~17\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000111100001111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + cin => \myVGA|Add17~17\, + combout => \myVGA|Add17~18_combout\); + +-- Location: LCCOMB_X31_Y67_N10 +\myVGA|LessThan15~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~1_cout\ = CARRY((!\myVGA|v_px_count\(0) & \myVGA|Add17~0_combout\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001000100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(0), + datab => \myVGA|Add17~0_combout\, + datad => VCC, + cout => \myVGA|LessThan15~1_cout\); + +-- Location: LCCOMB_X31_Y67_N12 +\myVGA|LessThan15~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~3_cout\ = CARRY((\myVGA|v_px_count\(1) & ((!\myVGA|LessThan15~1_cout\) # (!\myVGA|Add17~2_combout\))) # (!\myVGA|v_px_count\(1) & (!\myVGA|Add17~2_combout\ & !\myVGA|LessThan15~1_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(1), + datab => \myVGA|Add17~2_combout\, + datad => VCC, + cin => \myVGA|LessThan15~1_cout\, + cout => \myVGA|LessThan15~3_cout\); + +-- Location: LCCOMB_X31_Y67_N14 +\myVGA|LessThan15~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~5_cout\ = CARRY((\myVGA|Add17~4_combout\ & ((!\myVGA|LessThan15~3_cout\) # (!\myVGA|v_px_count\(2)))) # (!\myVGA|Add17~4_combout\ & (!\myVGA|v_px_count\(2) & !\myVGA|LessThan15~3_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add17~4_combout\, + datab => \myVGA|v_px_count\(2), + datad => VCC, + cin => \myVGA|LessThan15~3_cout\, + cout => \myVGA|LessThan15~5_cout\); + +-- Location: LCCOMB_X31_Y67_N16 +\myVGA|LessThan15~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~7_cout\ = CARRY((\myVGA|v_px_count\(3) & ((!\myVGA|LessThan15~5_cout\) # (!\myVGA|Add17~6_combout\))) # (!\myVGA|v_px_count\(3) & (!\myVGA|Add17~6_combout\ & !\myVGA|LessThan15~5_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(3), + datab => \myVGA|Add17~6_combout\, + datad => VCC, + cin => \myVGA|LessThan15~5_cout\, + cout => \myVGA|LessThan15~7_cout\); + +-- Location: LCCOMB_X31_Y67_N18 +\myVGA|LessThan15~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~9_cout\ = CARRY((\myVGA|Add17~8_combout\ & ((!\myVGA|LessThan15~7_cout\) # (!\myVGA|v_px_count\(4)))) # (!\myVGA|Add17~8_combout\ & (!\myVGA|v_px_count\(4) & !\myVGA|LessThan15~7_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add17~8_combout\, + datab => \myVGA|v_px_count\(4), + datad => VCC, + cin => \myVGA|LessThan15~7_cout\, + cout => \myVGA|LessThan15~9_cout\); + +-- Location: LCCOMB_X31_Y67_N20 +\myVGA|LessThan15~11\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~11_cout\ = CARRY((\myVGA|v_px_count\(5) & ((!\myVGA|LessThan15~9_cout\) # (!\myVGA|Add17~10_combout\))) # (!\myVGA|v_px_count\(5) & (!\myVGA|Add17~10_combout\ & !\myVGA|LessThan15~9_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(5), + datab => \myVGA|Add17~10_combout\, + datad => VCC, + cin => \myVGA|LessThan15~9_cout\, + cout => \myVGA|LessThan15~11_cout\); + +-- Location: LCCOMB_X31_Y67_N22 +\myVGA|LessThan15~13\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~13_cout\ = CARRY((\myVGA|v_px_count\(6) & (\myVGA|Add17~12_combout\ & !\myVGA|LessThan15~11_cout\)) # (!\myVGA|v_px_count\(6) & ((\myVGA|Add17~12_combout\) # (!\myVGA|LessThan15~11_cout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000001001101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(6), + datab => \myVGA|Add17~12_combout\, + datad => VCC, + cin => \myVGA|LessThan15~11_cout\, + cout => \myVGA|LessThan15~13_cout\); + +-- Location: LCCOMB_X31_Y67_N24 +\myVGA|LessThan15~15\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~15_cout\ = CARRY((\myVGA|v_px_count\(7) & ((!\myVGA|LessThan15~13_cout\) # (!\myVGA|Add17~14_combout\))) # (!\myVGA|v_px_count\(7) & (!\myVGA|Add17~14_combout\ & !\myVGA|LessThan15~13_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(7), + datab => \myVGA|Add17~14_combout\, + datad => VCC, + cin => \myVGA|LessThan15~13_cout\, + cout => \myVGA|LessThan15~15_cout\); + +-- Location: LCCOMB_X31_Y67_N26 +\myVGA|LessThan15~17\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~17_cout\ = CARRY((\myVGA|Add17~16_combout\ & ((!\myVGA|LessThan15~15_cout\) # (!\myVGA|v_px_count\(8)))) # (!\myVGA|Add17~16_combout\ & (!\myVGA|v_px_count\(8) & !\myVGA|LessThan15~15_cout\))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000000101011", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add17~16_combout\, + datab => \myVGA|v_px_count\(8), + datad => VCC, + cin => \myVGA|LessThan15~15_cout\, + cout => \myVGA|LessThan15~17_cout\); + +-- Location: LCCOMB_X31_Y67_N28 +\myVGA|LessThan15~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|LessThan15~18_combout\ = (\myVGA|Add17~18_combout\ & ((\myVGA|LessThan15~17_cout\) # (!\myVGA|v_px_count\(9)))) # (!\myVGA|Add17~18_combout\ & (!\myVGA|v_px_count\(9) & \myVGA|LessThan15~17_cout\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1011001010110010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|Add17~18_combout\, + datab => \myVGA|v_px_count\(9), + cin => \myVGA|LessThan15~17_cout\, + combout => \myVGA|LessThan15~18_combout\); + +-- Location: LCCOMB_X32_Y68_N24 +\myVGA|Add15~20\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|Add15~20_combout\ = \myVGA|Add15~19\ + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111000011110000", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + cin => \myVGA|Add15~19\, + combout => \myVGA|Add15~20_combout\); + +-- Location: LCCOMB_X32_Y67_N2 +\myVGA|ball_draw~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_draw~0_combout\ = (\myVGA|LessThan13~18_combout\ & (\myVGA|Add15~20_combout\ & ((\myVGA|Add17~18_combout\) # (!\myVGA|LessThan15~18_combout\)))) # (!\myVGA|LessThan13~18_combout\ & ((\myVGA|Add17~18_combout\) # +-- ((!\myVGA|LessThan15~18_combout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100111101000101", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|LessThan13~18_combout\, + datab => \myVGA|Add17~18_combout\, + datac => \myVGA|LessThan15~18_combout\, + datad => \myVGA|Add15~20_combout\, + combout => \myVGA|ball_draw~0_combout\); + +-- Location: LCCOMB_X32_Y67_N0 +\myVGA|ball_draw~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_draw~1_combout\ = (\myVGA|LessThan14~18_combout\ & (\myVGA|ball_draw~0_combout\ & ((\myVGA|LessThan12~18_combout\) # (\myVGA|Add14~20_combout\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100100000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|LessThan12~18_combout\, + datab => \myVGA|LessThan14~18_combout\, + datac => \myVGA|Add14~20_combout\, + datad => \myVGA|ball_draw~0_combout\, + combout => \myVGA|ball_draw~1_combout\); + +-- Location: FF_X32_Y67_N1 +\myVGA|color_mask[0]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_draw~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|color_mask\(0)); + +-- Location: LCCOMB_X33_Y67_N30 +\myVGA|can_draw~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|can_draw~0_combout\ = (\myVGA|v_px_count\(9)) # ((\myVGA|h_px_count\(9) & ((\myVGA|h_px_count\(8)) # (\myVGA|h_px_count\(7))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111101011111000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(9), + datab => \myVGA|h_px_count\(8), + datac => \myVGA|v_px_count\(9), + datad => \myVGA|h_px_count\(7), + combout => \myVGA|can_draw~0_combout\); + +-- Location: LCCOMB_X35_Y67_N8 +\myVGA|V_SYNC_GEN~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|V_SYNC_GEN~0_combout\ = (\myVGA|v_px_count\(6) & (\myVGA|v_px_count\(7) & (\myVGA|v_px_count\(8) & \myVGA|v_px_count\(5)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(6), + datab => \myVGA|v_px_count\(7), + datac => \myVGA|v_px_count\(8), + datad => \myVGA|v_px_count\(5), + combout => \myVGA|V_SYNC_GEN~0_combout\); + +-- Location: LCCOMB_X33_Y67_N28 +\myVGA|can_draw~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|can_draw~1_combout\ = (\rst~input_o\ & (!\myVGA|can_draw~0_combout\ & ((!\myVGA|V_SYNC_GEN~0_combout\)))) # (!\rst~input_o\ & (((\myVGA|can_draw~q\)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101000001110010", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \rst~input_o\, + datab => \myVGA|can_draw~0_combout\, + datac => \myVGA|can_draw~q\, + datad => \myVGA|V_SYNC_GEN~0_combout\, + combout => \myVGA|can_draw~1_combout\); + +-- Location: FF_X33_Y67_N29 +\myVGA|can_draw\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|can_draw~1_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|can_draw~q\); + +-- Location: LCCOMB_X36_Y69_N0 +\myVGA|R[1]~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|R[1]~0_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(0) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000100000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|color_mask\(0), + datab => \myVGA|ball_b\(0), + datad => \myVGA|can_draw~q\, + combout => \myVGA|R[1]~0_combout\); + +-- Location: LCCOMB_X28_Y68_N14 +\myVGA|ball_g[1]~7\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_g[1]~7_combout\ = (\myVGA|ball_b\(0) & (\myVGA|ball_g\(1) $ (VCC))) # (!\myVGA|ball_b\(0) & (\myVGA|ball_g\(1) & VCC)) +-- \myVGA|ball_g[1]~8\ = CARRY((\myVGA|ball_b\(0) & \myVGA|ball_g\(1))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0110011010001000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_b\(0), + datab => \myVGA|ball_g\(1), + datad => VCC, + combout => \myVGA|ball_g[1]~7_combout\, + cout => \myVGA|ball_g[1]~8\); + +-- Location: FF_X28_Y68_N15 +\myVGA|ball_g[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_g[1]~7_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_g\(1)); + +-- Location: LCCOMB_X28_Y68_N10 +\myVGA|R[2]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|R[2]~1_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_g\(1) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|color_mask\(0), + datac => \myVGA|ball_g\(1), + datad => \myVGA|can_draw~q\, + combout => \myVGA|R[2]~1_combout\); + +-- Location: LCCOMB_X28_Y68_N16 +\myVGA|ball_g[2]~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_g[2]~9_combout\ = (\myVGA|ball_g\(2) & (!\myVGA|ball_g[1]~8\)) # (!\myVGA|ball_g\(2) & ((\myVGA|ball_g[1]~8\) # (GND))) +-- \myVGA|ball_g[2]~10\ = CARRY((!\myVGA|ball_g[1]~8\) # (!\myVGA|ball_g\(2))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_g\(2), + datad => VCC, + cin => \myVGA|ball_g[1]~8\, + combout => \myVGA|ball_g[2]~9_combout\, + cout => \myVGA|ball_g[2]~10\); + +-- Location: FF_X28_Y68_N17 +\myVGA|ball_g[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_g[2]~9_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_g\(2)); + +-- Location: LCCOMB_X28_Y68_N4 +\myVGA|R[3]~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|R[3]~2_combout\ = (\myVGA|ball_g\(2) & (\myVGA|color_mask\(0) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_g\(2), + datac => \myVGA|color_mask\(0), + datad => \myVGA|can_draw~q\, + combout => \myVGA|R[3]~2_combout\); + +-- Location: LCCOMB_X28_Y68_N18 +\myVGA|ball_g[3]~11\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_g[3]~11_combout\ = (\myVGA|ball_g\(3) & (\myVGA|ball_g[2]~10\ $ (GND))) # (!\myVGA|ball_g\(3) & (!\myVGA|ball_g[2]~10\ & VCC)) +-- \myVGA|ball_g[3]~12\ = CARRY((\myVGA|ball_g\(3) & !\myVGA|ball_g[2]~10\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_g\(3), + datad => VCC, + cin => \myVGA|ball_g[2]~10\, + combout => \myVGA|ball_g[3]~11_combout\, + cout => \myVGA|ball_g[3]~12\); + +-- Location: FF_X28_Y68_N19 +\myVGA|ball_g[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_g[3]~11_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_g\(3)); + +-- Location: LCCOMB_X28_Y68_N30 +\myVGA|R[4]~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|R[4]~3_combout\ = (\myVGA|ball_g\(3) & (\myVGA|color_mask\(0) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_g\(3), + datac => \myVGA|color_mask\(0), + datad => \myVGA|can_draw~q\, + combout => \myVGA|R[4]~3_combout\); + +-- Location: LCCOMB_X28_Y68_N20 +\myVGA|ball_g[4]~13\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_g[4]~13_combout\ = (\myVGA|ball_g\(4) & (!\myVGA|ball_g[3]~12\)) # (!\myVGA|ball_g\(4) & ((\myVGA|ball_g[3]~12\) # (GND))) +-- \myVGA|ball_g[4]~14\ = CARRY((!\myVGA|ball_g[3]~12\) # (!\myVGA|ball_g\(4))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_g\(4), + datad => VCC, + cin => \myVGA|ball_g[3]~12\, + combout => \myVGA|ball_g[4]~13_combout\, + cout => \myVGA|ball_g[4]~14\); + +-- Location: FF_X28_Y68_N21 +\myVGA|ball_g[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_g[4]~13_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_g\(4)); + +-- Location: LCCOMB_X28_Y68_N0 +\myVGA|R[5]~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|R[5]~4_combout\ = (\myVGA|ball_g\(4) & (\myVGA|color_mask\(0) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_g\(4), + datac => \myVGA|color_mask\(0), + datad => \myVGA|can_draw~q\, + combout => \myVGA|R[5]~4_combout\); + +-- Location: LCCOMB_X28_Y68_N22 +\myVGA|ball_g[5]~15\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_g[5]~15_combout\ = (\myVGA|ball_g\(5) & (\myVGA|ball_g[4]~14\ $ (GND))) # (!\myVGA|ball_g\(5) & (!\myVGA|ball_g[4]~14\ & VCC)) +-- \myVGA|ball_g[5]~16\ = CARRY((\myVGA|ball_g\(5) & !\myVGA|ball_g[4]~14\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_g\(5), + datad => VCC, + cin => \myVGA|ball_g[4]~14\, + combout => \myVGA|ball_g[5]~15_combout\, + cout => \myVGA|ball_g[5]~16\); + +-- Location: FF_X28_Y68_N23 +\myVGA|ball_g[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_g[5]~15_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_g\(5)); + +-- Location: LCCOMB_X28_Y68_N2 +\myVGA|R[6]~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|R[6]~5_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_g\(5) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|color_mask\(0), + datac => \myVGA|ball_g\(5), + datad => \myVGA|can_draw~q\, + combout => \myVGA|R[6]~5_combout\); + +-- Location: LCCOMB_X28_Y68_N24 +\myVGA|ball_g[6]~17\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_g[6]~17_combout\ = (\myVGA|ball_g\(6) & (!\myVGA|ball_g[5]~16\)) # (!\myVGA|ball_g\(6) & ((\myVGA|ball_g[5]~16\) # (GND))) +-- \myVGA|ball_g[6]~18\ = CARRY((!\myVGA|ball_g[5]~16\) # (!\myVGA|ball_g\(6))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_g\(6), + datad => VCC, + cin => \myVGA|ball_g[5]~16\, + combout => \myVGA|ball_g[6]~17_combout\, + cout => \myVGA|ball_g[6]~18\); + +-- Location: FF_X28_Y68_N25 +\myVGA|ball_g[6]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_g[6]~17_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_g\(6)); + +-- Location: LCCOMB_X28_Y68_N12 +\myVGA|R[7]~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|R[7]~6_combout\ = (\myVGA|ball_g\(6) & (\myVGA|color_mask\(0) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_g\(6), + datac => \myVGA|color_mask\(0), + datad => \myVGA|can_draw~q\, + combout => \myVGA|R[7]~6_combout\); + +-- Location: LCCOMB_X28_Y68_N26 +\myVGA|ball_g[7]~19\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_g[7]~19_combout\ = \myVGA|ball_g\(7) $ (!\myVGA|ball_g[6]~18\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010110100101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_g\(7), + cin => \myVGA|ball_g[6]~18\, + combout => \myVGA|ball_g[7]~19_combout\); + +-- Location: FF_X28_Y68_N27 +\myVGA|ball_g[7]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_g[7]~19_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_g\(7)); + +-- Location: LCCOMB_X28_Y68_N28 +\myVGA|G[7]~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|G[7]~0_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_g\(7) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|color_mask\(0), + datac => \myVGA|ball_g\(7), + datad => \myVGA|can_draw~q\, + combout => \myVGA|G[7]~0_combout\); + +-- Location: LCCOMB_X36_Y69_N8 +\myVGA|ball_b[1]~9\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[1]~9_cout\ = CARRY(\myVGA|ball_b\(0)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000011001100", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_b\(0), + datad => VCC, + cout => \myVGA|ball_b[1]~9_cout\); + +-- Location: LCCOMB_X36_Y69_N10 +\myVGA|ball_b[1]~10\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[1]~10_combout\ = (\myVGA|ball_b\(1) & (\myVGA|ball_b[1]~9_cout\ & VCC)) # (!\myVGA|ball_b\(1) & (!\myVGA|ball_b[1]~9_cout\)) +-- \myVGA|ball_b[1]~11\ = CARRY((!\myVGA|ball_b\(1) & !\myVGA|ball_b[1]~9_cout\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100000101", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_b\(1), + datad => VCC, + cin => \myVGA|ball_b[1]~9_cout\, + combout => \myVGA|ball_b[1]~10_combout\, + cout => \myVGA|ball_b[1]~11\); + +-- Location: FF_X36_Y69_N11 +\myVGA|ball_b[1]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_b[1]~10_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_b\(1)); + +-- Location: LCCOMB_X36_Y69_N2 +\myVGA|B[1]~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|B[1]~0_combout\ = (\myVGA|color_mask\(0) & (\myVGA|can_draw~q\ & \myVGA|ball_b\(1))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|color_mask\(0), + datac => \myVGA|can_draw~q\, + datad => \myVGA|ball_b\(1), + combout => \myVGA|B[1]~0_combout\); + +-- Location: LCCOMB_X36_Y69_N12 +\myVGA|ball_b[2]~12\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[2]~12_combout\ = (\myVGA|ball_b\(2) & (\myVGA|ball_b[1]~11\ $ (GND))) # (!\myVGA|ball_b\(2) & (!\myVGA|ball_b[1]~11\ & VCC)) +-- \myVGA|ball_b[2]~13\ = CARRY((\myVGA|ball_b\(2) & !\myVGA|ball_b[1]~11\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010010100001010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_b\(2), + datad => VCC, + cin => \myVGA|ball_b[1]~11\, + combout => \myVGA|ball_b[2]~12_combout\, + cout => \myVGA|ball_b[2]~13\); + +-- Location: FF_X36_Y69_N13 +\myVGA|ball_b[2]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_b[2]~12_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_b\(2)); + +-- Location: LCCOMB_X36_Y69_N28 +\myVGA|B[2]~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|B[2]~1_combout\ = (\myVGA|color_mask\(0) & (\myVGA|can_draw~q\ & \myVGA|ball_b\(2))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|color_mask\(0), + datac => \myVGA|can_draw~q\, + datad => \myVGA|ball_b\(2), + combout => \myVGA|B[2]~1_combout\); + +-- Location: LCCOMB_X36_Y69_N14 +\myVGA|ball_b[3]~14\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[3]~14_combout\ = (\myVGA|ball_b\(3) & (!\myVGA|ball_b[2]~13\)) # (!\myVGA|ball_b\(3) & ((\myVGA|ball_b[2]~13\) # (GND))) +-- \myVGA|ball_b[3]~15\ = CARRY((!\myVGA|ball_b[2]~13\) # (!\myVGA|ball_b\(3))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_b\(3), + datad => VCC, + cin => \myVGA|ball_b[2]~13\, + combout => \myVGA|ball_b[3]~14_combout\, + cout => \myVGA|ball_b[3]~15\); + +-- Location: FF_X36_Y69_N15 +\myVGA|ball_b[3]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_b[3]~14_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_b\(3)); + +-- Location: LCCOMB_X36_Y69_N6 +\myVGA|B[3]~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|B[3]~2_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(3) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|color_mask\(0), + datac => \myVGA|ball_b\(3), + datad => \myVGA|can_draw~q\, + combout => \myVGA|B[3]~2_combout\); + +-- Location: LCCOMB_X36_Y69_N16 +\myVGA|ball_b[4]~16\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[4]~16_combout\ = (\myVGA|ball_b\(4) & (\myVGA|ball_b[3]~15\ $ (GND))) # (!\myVGA|ball_b\(4) & (!\myVGA|ball_b[3]~15\ & VCC)) +-- \myVGA|ball_b[4]~17\ = CARRY((\myVGA|ball_b\(4) & !\myVGA|ball_b[3]~15\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_b\(4), + datad => VCC, + cin => \myVGA|ball_b[3]~15\, + combout => \myVGA|ball_b[4]~16_combout\, + cout => \myVGA|ball_b[4]~17\); + +-- Location: FF_X36_Y69_N17 +\myVGA|ball_b[4]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_b[4]~16_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_b\(4)); + +-- Location: LCCOMB_X36_Y69_N24 +\myVGA|B[4]~3\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|B[4]~3_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(4) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000100000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|color_mask\(0), + datab => \myVGA|ball_b\(4), + datad => \myVGA|can_draw~q\, + combout => \myVGA|B[4]~3_combout\); + +-- Location: LCCOMB_X36_Y69_N18 +\myVGA|ball_b[5]~18\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[5]~18_combout\ = (\myVGA|ball_b\(5) & (!\myVGA|ball_b[4]~17\)) # (!\myVGA|ball_b\(5) & ((\myVGA|ball_b[4]~17\) # (GND))) +-- \myVGA|ball_b[5]~19\ = CARRY((!\myVGA|ball_b[4]~17\) # (!\myVGA|ball_b\(5))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0011110000111111", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_b\(5), + datad => VCC, + cin => \myVGA|ball_b[4]~17\, + combout => \myVGA|ball_b[5]~18_combout\, + cout => \myVGA|ball_b[5]~19\); + +-- Location: FF_X36_Y69_N19 +\myVGA|ball_b[5]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_b[5]~18_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_b\(5)); + +-- Location: LCCOMB_X36_Y69_N26 +\myVGA|B[5]~4\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|B[5]~4_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(5) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000100000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|color_mask\(0), + datab => \myVGA|ball_b\(5), + datad => \myVGA|can_draw~q\, + combout => \myVGA|B[5]~4_combout\); + +-- Location: LCCOMB_X36_Y69_N20 +\myVGA|ball_b[6]~20\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[6]~20_combout\ = (\myVGA|ball_b\(6) & (\myVGA|ball_b[5]~19\ $ (GND))) # (!\myVGA|ball_b\(6) & (!\myVGA|ball_b[5]~19\ & VCC)) +-- \myVGA|ball_b[6]~21\ = CARRY((\myVGA|ball_b\(6) & !\myVGA|ball_b[5]~19\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1100001100001100", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|ball_b\(6), + datad => VCC, + cin => \myVGA|ball_b[5]~19\, + combout => \myVGA|ball_b[6]~20_combout\, + cout => \myVGA|ball_b[6]~21\); + +-- Location: FF_X36_Y69_N21 +\myVGA|ball_b[6]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_b[6]~20_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_b\(6)); + +-- Location: LCCOMB_X36_Y69_N4 +\myVGA|B[6]~5\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|B[6]~5_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(6) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1000100000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|color_mask\(0), + datab => \myVGA|ball_b\(6), + datad => \myVGA|can_draw~q\, + combout => \myVGA|B[6]~5_combout\); + +-- Location: LCCOMB_X36_Y69_N22 +\myVGA|ball_b[7]~22\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|ball_b[7]~22_combout\ = \myVGA|ball_b\(7) $ (\myVGA|ball_b[6]~21\) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0101101001011010", + sum_lutc_input => "cin") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|ball_b\(7), + cin => \myVGA|ball_b[6]~21\, + combout => \myVGA|ball_b[7]~22_combout\); + +-- Location: FF_X36_Y69_N23 +\myVGA|ball_b[7]\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|ball_b[7]~22_combout\, + ena => \myVGA|ball_b[0]~7_combout\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|ball_b\(7)); + +-- Location: LCCOMB_X36_Y69_N30 +\myVGA|B[7]~6\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|B[7]~6_combout\ = (\myVGA|color_mask\(0) & (\myVGA|ball_b\(7) & \myVGA|can_draw~q\)) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1010000000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|color_mask\(0), + datac => \myVGA|ball_b\(7), + datad => \myVGA|can_draw~q\, + combout => \myVGA|B[7]~6_combout\); + +-- Location: LCCOMB_X34_Y67_N28 +\myVGA|H_SYNC_GEN~0\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|H_SYNC_GEN~0_combout\ = (\myVGA|h_px_count\(9) & (\myVGA|h_px_count\(7) & !\myVGA|h_px_count\(8))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000000010100000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(9), + datac => \myVGA|h_px_count\(7), + datad => \myVGA|h_px_count\(8), + combout => \myVGA|H_SYNC_GEN~0_combout\); + +-- Location: LCCOMB_X34_Y67_N0 +\myVGA|H_SYNC_GEN~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|H_SYNC_GEN~1_combout\ = (\myVGA|H_SYNC_GEN~0_combout\ & ((\myVGA|h_px_count\(4) & ((!\myVGA|h_px_count\(6)) # (!\myVGA|h_px_count\(5)))) # (!\myVGA|h_px_count\(4) & ((\myVGA|h_px_count\(5)) # (\myVGA|h_px_count\(6)))))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0100110011001000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|h_px_count\(4), + datab => \myVGA|H_SYNC_GEN~0_combout\, + datac => \myVGA|h_px_count\(5), + datad => \myVGA|h_px_count\(6), + combout => \myVGA|H_SYNC_GEN~1_combout\); + +-- Location: FF_X34_Y67_N1 +\myVGA|HS\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|H_SYNC_GEN~1_combout\, + clrn => \rst~input_o\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|HS~q\); + +-- Location: LCCOMB_X35_Y67_N30 +\myVGA|V_SYNC_GEN~1\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|V_SYNC_GEN~1_combout\ = (\myVGA|v_px_count\(2)) # ((\myVGA|v_px_count\(4)) # ((\myVGA|v_px_count\(9)) # (!\myVGA|v_px_count\(3)))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "1111111111101111", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + dataa => \myVGA|v_px_count\(2), + datab => \myVGA|v_px_count\(4), + datac => \myVGA|v_px_count\(3), + datad => \myVGA|v_px_count\(9), + combout => \myVGA|V_SYNC_GEN~1_combout\); + +-- Location: LCCOMB_X34_Y67_N2 +\myVGA|V_SYNC_GEN~2\ : cycloneive_lcell_comb +-- Equation(s): +-- \myVGA|V_SYNC_GEN~2_combout\ = (\myVGA|V_SYNC_GEN~0_combout\ & (!\myVGA|V_SYNC_GEN~1_combout\ & \myVGA|v_px_count\(1))) + +-- pragma translate_off +GENERIC MAP ( + lut_mask => "0000110000000000", + sum_lutc_input => "datac") +-- pragma translate_on +PORT MAP ( + datab => \myVGA|V_SYNC_GEN~0_combout\, + datac => \myVGA|V_SYNC_GEN~1_combout\, + datad => \myVGA|v_px_count\(1), + combout => \myVGA|V_SYNC_GEN~2_combout\); + +-- Location: FF_X34_Y67_N3 +\myVGA|VS\ : dffeas +-- pragma translate_off +GENERIC MAP ( + is_wysiwyg => "true", + power_up => "low") +-- pragma translate_on +PORT MAP ( + clk => \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk\, + d => \myVGA|V_SYNC_GEN~2_combout\, + clrn => \rst~input_o\, + devclrn => ww_devclrn, + devpor => ww_devpor, + q => \myVGA|VS~q\); +END structure; + + diff --git a/simulation/modelsim/vga_modelsim.xrf b/simulation/modelsim/vga_modelsim.xrf new file mode 100644 index 0000000..9811fbc --- /dev/null +++ b/simulation/modelsim/vga_modelsim.xrf @@ -0,0 +1,391 @@ +vendor_name = ModelSim +source_file = 1, /home/lambda/Programs/intelQuartus/projects/vga/src/main.vhd +source_file = 1, /home/lambda/Programs/intelQuartus/projects/vga/src/vga.vhd +source_file = 1, /home/lambda/Programs/intelQuartus/projects/vga/pll.qip +source_file = 1, /home/lambda/Programs/intelQuartus/projects/vga/pll.vhd +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/vhdl/ieee/prmtvs_b.vhd +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/vhdl/ieee/prmtvs_p.vhd +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/vhdl/ieee/timing_b.vhd +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/vhdl/ieee/timing_p.vhd +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/megafunctions/altpll.tdf +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/megafunctions/aglobal221.inc +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/megafunctions/stratix_pll.inc +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/megafunctions/stratixii_pll.inc +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/megafunctions/cycloneii_pll.inc +source_file = 1, /home/lambda/Programs/intelQuartus/quartus/libraries/megafunctions/cbx.lst +source_file = 1, /home/lambda/Programs/intelQuartus/projects/vga/db/pll_altpll.v +design_name = MAIN +instance = comp, \VGA_BLANK~output\, VGA_BLANK~output, MAIN, 1 +instance = comp, \VGA_SYNC~output\, VGA_SYNC~output, MAIN, 1 +instance = comp, \VGA_CLK~output\, VGA_CLK~output, MAIN, 1 +instance = comp, \R[0]~output\, R[0]~output, MAIN, 1 +instance = comp, \R[1]~output\, R[1]~output, MAIN, 1 +instance = comp, \R[2]~output\, R[2]~output, MAIN, 1 +instance = comp, \R[3]~output\, R[3]~output, MAIN, 1 +instance = comp, \R[4]~output\, R[4]~output, MAIN, 1 +instance = comp, \R[5]~output\, R[5]~output, MAIN, 1 +instance = comp, \R[6]~output\, R[6]~output, MAIN, 1 +instance = comp, \R[7]~output\, R[7]~output, MAIN, 1 +instance = comp, \G[0]~output\, G[0]~output, MAIN, 1 +instance = comp, \G[1]~output\, G[1]~output, MAIN, 1 +instance = comp, \G[2]~output\, G[2]~output, MAIN, 1 +instance = comp, \G[3]~output\, G[3]~output, MAIN, 1 +instance = comp, \G[4]~output\, G[4]~output, MAIN, 1 +instance = comp, \G[5]~output\, G[5]~output, MAIN, 1 +instance = comp, \G[6]~output\, G[6]~output, MAIN, 1 +instance = comp, \G[7]~output\, G[7]~output, MAIN, 1 +instance = comp, \B[0]~output\, B[0]~output, MAIN, 1 +instance = comp, \B[1]~output\, B[1]~output, MAIN, 1 +instance = comp, \B[2]~output\, B[2]~output, MAIN, 1 +instance = comp, \B[3]~output\, B[3]~output, MAIN, 1 +instance = comp, \B[4]~output\, B[4]~output, MAIN, 1 +instance = comp, \B[5]~output\, B[5]~output, MAIN, 1 +instance = comp, \B[6]~output\, B[6]~output, MAIN, 1 +instance = comp, \B[7]~output\, B[7]~output, MAIN, 1 +instance = comp, \HS~output\, HS~output, MAIN, 1 +instance = comp, \VS~output\, VS~output, MAIN, 1 +instance = comp, \clk~input\, clk~input, MAIN, 1 +instance = comp, \myPLL|altpll_component|auto_generated|pll1\, myPLL|altpll_component|auto_generated|pll1, MAIN, 1 +instance = comp, \myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl\, myPLL|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl, MAIN, 1 +instance = comp, \myVGA|h_px_count[0]~10\, myVGA|h_px_count[0]~10, MAIN, 1 +instance = comp, \rst~input\, rst~input, MAIN, 1 +instance = comp, \myVGA|LessThan0~0\, myVGA|LessThan0~0, MAIN, 1 +instance = comp, \myVGA|LessThan0~1\, myVGA|LessThan0~1, MAIN, 1 +instance = comp, \myVGA|h_px_count[0]\, myVGA|h_px_count[0], MAIN, 1 +instance = comp, \myVGA|h_px_count[1]~12\, myVGA|h_px_count[1]~12, MAIN, 1 +instance = comp, \myVGA|h_px_count[1]\, myVGA|h_px_count[1], MAIN, 1 +instance = comp, \myVGA|h_px_count[2]~14\, myVGA|h_px_count[2]~14, MAIN, 1 +instance = comp, \myVGA|h_px_count[2]\, myVGA|h_px_count[2], MAIN, 1 +instance = comp, \myVGA|h_px_count[3]~16\, myVGA|h_px_count[3]~16, MAIN, 1 +instance = comp, \myVGA|h_px_count[3]\, myVGA|h_px_count[3], MAIN, 1 +instance = comp, \myVGA|h_px_count[4]~18\, myVGA|h_px_count[4]~18, MAIN, 1 +instance = comp, \myVGA|h_px_count[4]\, myVGA|h_px_count[4], MAIN, 1 +instance = comp, \myVGA|h_px_count[5]~20\, myVGA|h_px_count[5]~20, MAIN, 1 +instance = comp, \myVGA|h_px_count[5]\, myVGA|h_px_count[5], MAIN, 1 +instance = comp, \myVGA|h_px_count[6]~22\, myVGA|h_px_count[6]~22, MAIN, 1 +instance = comp, \myVGA|h_px_count[6]\, myVGA|h_px_count[6], MAIN, 1 +instance = comp, \myVGA|h_px_count[7]~24\, myVGA|h_px_count[7]~24, MAIN, 1 +instance = comp, \myVGA|h_px_count[7]\, myVGA|h_px_count[7], MAIN, 1 +instance = comp, \myVGA|h_px_count[8]~26\, myVGA|h_px_count[8]~26, MAIN, 1 +instance = comp, \myVGA|h_px_count[8]\, myVGA|h_px_count[8], MAIN, 1 +instance = comp, \myVGA|h_px_count[9]~28\, myVGA|h_px_count[9]~28, MAIN, 1 +instance = comp, \myVGA|h_px_count[9]\, myVGA|h_px_count[9], MAIN, 1 +instance = comp, \myVGA|ball_bounce:ball_speed_x[1]~0\, myVGA|\ball_bounce:ball_speed_x[1]~0, MAIN, 1 +instance = comp, \myVGA|Add1~0\, myVGA|Add1~0, MAIN, 1 +instance = comp, \myVGA|v_px_count[9]~0\, myVGA|v_px_count[9]~0, MAIN, 1 +instance = comp, \myVGA|v_px_count[0]\, myVGA|v_px_count[0], MAIN, 1 +instance = comp, \myVGA|Add1~2\, myVGA|Add1~2, MAIN, 1 +instance = comp, \myVGA|Add1~4\, myVGA|Add1~4, MAIN, 1 +instance = comp, \myVGA|v_px_count[2]~3\, myVGA|v_px_count[2]~3, MAIN, 1 +instance = comp, \myVGA|v_px_count[2]\, myVGA|v_px_count[2], MAIN, 1 +instance = comp, \myVGA|Add1~6\, myVGA|Add1~6, MAIN, 1 +instance = comp, \myVGA|v_px_count[3]~4\, myVGA|v_px_count[3]~4, MAIN, 1 +instance = comp, \myVGA|v_px_count[3]\, myVGA|v_px_count[3], MAIN, 1 +instance = comp, \myVGA|Add1~8\, myVGA|Add1~8, MAIN, 1 +instance = comp, \myVGA|v_px_count[4]\, myVGA|v_px_count[4], MAIN, 1 +instance = comp, \myVGA|Add1~10\, myVGA|Add1~10, MAIN, 1 +instance = comp, \myVGA|v_px_count[5]\, myVGA|v_px_count[5], MAIN, 1 +instance = comp, \myVGA|Add1~12\, myVGA|Add1~12, MAIN, 1 +instance = comp, \myVGA|v_px_count[6]\, myVGA|v_px_count[6], MAIN, 1 +instance = comp, \myVGA|Add1~14\, myVGA|Add1~14, MAIN, 1 +instance = comp, \myVGA|v_px_count[7]\, myVGA|v_px_count[7], MAIN, 1 +instance = comp, \myVGA|Add1~16\, myVGA|Add1~16, MAIN, 1 +instance = comp, \myVGA|v_px_count[8]\, myVGA|v_px_count[8], MAIN, 1 +instance = comp, \myVGA|Add1~18\, myVGA|Add1~18, MAIN, 1 +instance = comp, \myVGA|v_px_count[9]~2\, myVGA|v_px_count[9]~2, MAIN, 1 +instance = comp, \myVGA|v_px_count[9]\, myVGA|v_px_count[9], MAIN, 1 +instance = comp, \myVGA|Equal0~1\, myVGA|Equal0~1, MAIN, 1 +instance = comp, \myVGA|Equal0~0\, myVGA|Equal0~0, MAIN, 1 +instance = comp, \myVGA|Equal0~2\, myVGA|Equal0~2, MAIN, 1 +instance = comp, \myVGA|v_px_count[1]~1\, myVGA|v_px_count[1]~1, MAIN, 1 +instance = comp, \myVGA|v_px_count[1]~5\, myVGA|v_px_count[1]~5, MAIN, 1 +instance = comp, \myVGA|v_px_count[1]\, myVGA|v_px_count[1], MAIN, 1 +instance = comp, \myVGA|Equal1~0\, myVGA|Equal1~0, MAIN, 1 +instance = comp, \myVGA|Equal1~1\, myVGA|Equal1~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[0]~1\, myVGA|\ball_bounce:count[0]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[0]\, myVGA|\ball_bounce:count[0], MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[1]~1\, myVGA|\ball_bounce:count[1]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[1]\, myVGA|\ball_bounce:count[1], MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[2]~1\, myVGA|\ball_bounce:count[2]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[2]\, myVGA|\ball_bounce:count[2], MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[3]~1\, myVGA|\ball_bounce:count[3]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[3]\, myVGA|\ball_bounce:count[3], MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[4]~1\, myVGA|\ball_bounce:count[4]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[4]\, myVGA|\ball_bounce:count[4], MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[5]~1\, myVGA|\ball_bounce:count[5]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[5]\, myVGA|\ball_bounce:count[5], MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[6]~1\, myVGA|\ball_bounce:count[6]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[6]\, myVGA|\ball_bounce:count[6], MAIN, 1 +instance = comp, \myVGA|LessThan7~0\, myVGA|LessThan7~0, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[7]~1\, myVGA|\ball_bounce:count[7]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[7]\, myVGA|\ball_bounce:count[7], MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[8]~1\, myVGA|\ball_bounce:count[8]~1, MAIN, 1 +instance = comp, \myVGA|ball_bounce:count[8]\, myVGA|\ball_bounce:count[8], MAIN, 1 +instance = comp, \myVGA|LessThan7~1\, myVGA|LessThan7~1, MAIN, 1 +instance = comp, \myVGA|ball_b[0]~7\, myVGA|ball_b[0]~7, MAIN, 1 +instance = comp, \myVGA|ball_bounce:ball_speed_x[1]\, myVGA|\ball_bounce:ball_speed_x[1], MAIN, 1 +instance = comp, \myVGA|ball_b[0]~24\, myVGA|ball_b[0]~24, MAIN, 1 +instance = comp, \myVGA|ball_b[0]\, myVGA|ball_b[0], MAIN, 1 +instance = comp, \myVGA|ball_x[1]~10\, myVGA|ball_x[1]~10, MAIN, 1 +instance = comp, \myVGA|ball_x[1]~11\, myVGA|ball_x[1]~11, MAIN, 1 +instance = comp, \myVGA|ball_x[1]\, myVGA|ball_x[1], MAIN, 1 +instance = comp, \myVGA|ball_x[2]~13\, myVGA|ball_x[2]~13, MAIN, 1 +instance = comp, \myVGA|ball_x[2]\, myVGA|ball_x[2], MAIN, 1 +instance = comp, \myVGA|ball_x[3]~15\, myVGA|ball_x[3]~15, MAIN, 1 +instance = comp, \myVGA|ball_x[3]\, myVGA|ball_x[3], MAIN, 1 +instance = comp, \myVGA|ball_x[4]~17\, myVGA|ball_x[4]~17, MAIN, 1 +instance = comp, \myVGA|ball_x[4]\, myVGA|ball_x[4], MAIN, 1 +instance = comp, \myVGA|ball_x[5]~19\, myVGA|ball_x[5]~19, MAIN, 1 +instance = comp, \myVGA|ball_x[5]\, myVGA|ball_x[5], MAIN, 1 +instance = comp, \myVGA|Add19~0\, myVGA|Add19~0, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[9]\, myVGA|\vary_ball_width:count[9], MAIN, 1 +instance = comp, \myVGA|Add18~0\, myVGA|Add18~0, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[0]\, myVGA|\vary_ball_width:count[0], MAIN, 1 +instance = comp, \myVGA|Add18~2\, myVGA|Add18~2, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[1]\, myVGA|\vary_ball_width:count[1], MAIN, 1 +instance = comp, \myVGA|Add18~4\, myVGA|Add18~4, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[2]\, myVGA|\vary_ball_width:count[2], MAIN, 1 +instance = comp, \myVGA|Add18~6\, myVGA|Add18~6, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[3]\, myVGA|\vary_ball_width:count[3], MAIN, 1 +instance = comp, \myVGA|Add18~8\, myVGA|Add18~8, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[4]\, myVGA|\vary_ball_width:count[4], MAIN, 1 +instance = comp, \myVGA|Add18~10\, myVGA|Add18~10, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[5]\, myVGA|\vary_ball_width:count[5], MAIN, 1 +instance = comp, \myVGA|Add18~12\, myVGA|Add18~12, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[6]\, myVGA|\vary_ball_width:count[6], MAIN, 1 +instance = comp, \myVGA|Add18~14\, myVGA|Add18~14, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[7]\, myVGA|\vary_ball_width:count[7], MAIN, 1 +instance = comp, \myVGA|Add18~16\, myVGA|Add18~16, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:count[8]\, myVGA|\vary_ball_width:count[8], MAIN, 1 +instance = comp, \myVGA|Add18~18\, myVGA|Add18~18, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[5]~2\, myVGA|BALL_WIDTH[5]~2, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[5]~1\, myVGA|BALL_WIDTH[5]~1, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[5]~0\, myVGA|BALL_WIDTH[5]~0, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[5]~3\, myVGA|BALL_WIDTH[5]~3, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[0]\, myVGA|BALL_WIDTH[0], MAIN, 1 +instance = comp, \myVGA|Add19~2\, myVGA|Add19~2, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[1]~5\, myVGA|BALL_WIDTH[1]~5, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[1]\, myVGA|BALL_WIDTH[1], MAIN, 1 +instance = comp, \myVGA|Add19~4\, myVGA|Add19~4, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[2]\, myVGA|BALL_WIDTH[2], MAIN, 1 +instance = comp, \myVGA|growth~0\, myVGA|growth~0, MAIN, 1 +instance = comp, \myVGA|vary_ball_width:growth[1]\, myVGA|\vary_ball_width:growth[1], MAIN, 1 +instance = comp, \myVGA|Add19~6\, myVGA|Add19~6, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[3]~4\, myVGA|BALL_WIDTH[3]~4, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[3]\, myVGA|BALL_WIDTH[3], MAIN, 1 +instance = comp, \myVGA|Add19~8\, myVGA|Add19~8, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[4]\, myVGA|BALL_WIDTH[4], MAIN, 1 +instance = comp, \myVGA|growth~1\, myVGA|growth~1, MAIN, 1 +instance = comp, \myVGA|growth~2\, myVGA|growth~2, MAIN, 1 +instance = comp, \myVGA|Add19~10\, myVGA|Add19~10, MAIN, 1 +instance = comp, \myVGA|BALL_WIDTH[5]\, myVGA|BALL_WIDTH[5], MAIN, 1 +instance = comp, \myVGA|LessThan10~1\, myVGA|LessThan10~1, MAIN, 1 +instance = comp, \myVGA|LessThan10~3\, myVGA|LessThan10~3, MAIN, 1 +instance = comp, \myVGA|LessThan10~5\, myVGA|LessThan10~5, MAIN, 1 +instance = comp, \myVGA|LessThan10~7\, myVGA|LessThan10~7, MAIN, 1 +instance = comp, \myVGA|LessThan10~9\, myVGA|LessThan10~9, MAIN, 1 +instance = comp, \myVGA|LessThan10~10\, myVGA|LessThan10~10, MAIN, 1 +instance = comp, \myVGA|ball_x[6]~21\, myVGA|ball_x[6]~21, MAIN, 1 +instance = comp, \myVGA|ball_x[6]\, myVGA|ball_x[6], MAIN, 1 +instance = comp, \myVGA|ball_x[7]~23\, myVGA|ball_x[7]~23, MAIN, 1 +instance = comp, \myVGA|ball_x[7]\, myVGA|ball_x[7], MAIN, 1 +instance = comp, \myVGA|LessThan10~12\, myVGA|LessThan10~12, MAIN, 1 +instance = comp, \myVGA|Add3~0\, myVGA|Add3~0, MAIN, 1 +instance = comp, \myVGA|Add3~2\, myVGA|Add3~2, MAIN, 1 +instance = comp, \myVGA|Add3~4\, myVGA|Add3~4, MAIN, 1 +instance = comp, \myVGA|Add3~6\, myVGA|Add3~6, MAIN, 1 +instance = comp, \myVGA|Add3~8\, myVGA|Add3~8, MAIN, 1 +instance = comp, \myVGA|LessThan8~6\, myVGA|LessThan8~6, MAIN, 1 +instance = comp, \myVGA|Add3~10\, myVGA|Add3~10, MAIN, 1 +instance = comp, \myVGA|LessThan8~7\, myVGA|LessThan8~7, MAIN, 1 +instance = comp, \myVGA|ball_x[8]~25\, myVGA|ball_x[8]~25, MAIN, 1 +instance = comp, \myVGA|ball_x[8]\, myVGA|ball_x[8], MAIN, 1 +instance = comp, \myVGA|LessThan8~0\, myVGA|LessThan8~0, MAIN, 1 +instance = comp, \myVGA|LessThan8~1\, myVGA|LessThan8~1, MAIN, 1 +instance = comp, \myVGA|LessThan8~2\, myVGA|LessThan8~2, MAIN, 1 +instance = comp, \myVGA|LessThan8~3\, myVGA|LessThan8~3, MAIN, 1 +instance = comp, \myVGA|LessThan8~4\, myVGA|LessThan8~4, MAIN, 1 +instance = comp, \myVGA|LessThan8~5\, myVGA|LessThan8~5, MAIN, 1 +instance = comp, \myVGA|LessThan8~8\, myVGA|LessThan8~8, MAIN, 1 +instance = comp, \myVGA|ball_speed_x~0\, myVGA|ball_speed_x~0, MAIN, 1 +instance = comp, \myVGA|ball_x[9]~27\, myVGA|ball_x[9]~27, MAIN, 1 +instance = comp, \myVGA|ball_x[9]\, myVGA|ball_x[9], MAIN, 1 +instance = comp, \myVGA|Add14~0\, myVGA|Add14~0, MAIN, 1 +instance = comp, \myVGA|Add14~2\, myVGA|Add14~2, MAIN, 1 +instance = comp, \myVGA|Add14~4\, myVGA|Add14~4, MAIN, 1 +instance = comp, \myVGA|Add14~6\, myVGA|Add14~6, MAIN, 1 +instance = comp, \myVGA|Add14~8\, myVGA|Add14~8, MAIN, 1 +instance = comp, \myVGA|Add14~10\, myVGA|Add14~10, MAIN, 1 +instance = comp, \myVGA|Add14~12\, myVGA|Add14~12, MAIN, 1 +instance = comp, \myVGA|Add14~14\, myVGA|Add14~14, MAIN, 1 +instance = comp, \myVGA|Add14~16\, myVGA|Add14~16, MAIN, 1 +instance = comp, \myVGA|Add14~18\, myVGA|Add14~18, MAIN, 1 +instance = comp, \myVGA|LessThan12~1\, myVGA|LessThan12~1, MAIN, 1 +instance = comp, \myVGA|LessThan12~3\, myVGA|LessThan12~3, MAIN, 1 +instance = comp, \myVGA|LessThan12~5\, myVGA|LessThan12~5, MAIN, 1 +instance = comp, \myVGA|LessThan12~7\, myVGA|LessThan12~7, MAIN, 1 +instance = comp, \myVGA|LessThan12~9\, myVGA|LessThan12~9, MAIN, 1 +instance = comp, \myVGA|LessThan12~11\, myVGA|LessThan12~11, MAIN, 1 +instance = comp, \myVGA|LessThan12~13\, myVGA|LessThan12~13, MAIN, 1 +instance = comp, \myVGA|LessThan12~15\, myVGA|LessThan12~15, MAIN, 1 +instance = comp, \myVGA|LessThan12~17\, myVGA|LessThan12~17, MAIN, 1 +instance = comp, \myVGA|LessThan12~18\, myVGA|LessThan12~18, MAIN, 1 +instance = comp, \myVGA|ball_y[1]~9\, myVGA|ball_y[1]~9, MAIN, 1 +instance = comp, \myVGA|ball_y[1]~10\, myVGA|ball_y[1]~10, MAIN, 1 +instance = comp, \myVGA|ball_y[1]\, myVGA|ball_y[1], MAIN, 1 +instance = comp, \myVGA|ball_y[2]~12\, myVGA|ball_y[2]~12, MAIN, 1 +instance = comp, \myVGA|ball_y[2]\, myVGA|ball_y[2], MAIN, 1 +instance = comp, \myVGA|ball_y[3]~14\, myVGA|ball_y[3]~14, MAIN, 1 +instance = comp, \myVGA|ball_y[3]\, myVGA|ball_y[3], MAIN, 1 +instance = comp, \myVGA|ball_y[4]~16\, myVGA|ball_y[4]~16, MAIN, 1 +instance = comp, \myVGA|ball_y[4]\, myVGA|ball_y[4], MAIN, 1 +instance = comp, \myVGA|ball_y[5]~18\, myVGA|ball_y[5]~18, MAIN, 1 +instance = comp, \myVGA|ball_y[5]\, myVGA|ball_y[5], MAIN, 1 +instance = comp, \myVGA|ball_y[6]~20\, myVGA|ball_y[6]~20, MAIN, 1 +instance = comp, \myVGA|ball_y[6]\, myVGA|ball_y[6], MAIN, 1 +instance = comp, \myVGA|LessThan11~1\, myVGA|LessThan11~1, MAIN, 1 +instance = comp, \myVGA|LessThan11~3\, myVGA|LessThan11~3, MAIN, 1 +instance = comp, \myVGA|LessThan11~5\, myVGA|LessThan11~5, MAIN, 1 +instance = comp, \myVGA|LessThan11~7\, myVGA|LessThan11~7, MAIN, 1 +instance = comp, \myVGA|LessThan11~9\, myVGA|LessThan11~9, MAIN, 1 +instance = comp, \myVGA|LessThan11~10\, myVGA|LessThan11~10, MAIN, 1 +instance = comp, \myVGA|Add5~0\, myVGA|Add5~0, MAIN, 1 +instance = comp, \myVGA|Add5~2\, myVGA|Add5~2, MAIN, 1 +instance = comp, \myVGA|Add5~4\, myVGA|Add5~4, MAIN, 1 +instance = comp, \myVGA|Add5~6\, myVGA|Add5~6, MAIN, 1 +instance = comp, \myVGA|Add5~8\, myVGA|Add5~8, MAIN, 1 +instance = comp, \myVGA|Add5~10\, myVGA|Add5~10, MAIN, 1 +instance = comp, \myVGA|LessThan9~1\, myVGA|LessThan9~1, MAIN, 1 +instance = comp, \myVGA|LessThan9~3\, myVGA|LessThan9~3, MAIN, 1 +instance = comp, \myVGA|LessThan9~5\, myVGA|LessThan9~5, MAIN, 1 +instance = comp, \myVGA|LessThan9~7\, myVGA|LessThan9~7, MAIN, 1 +instance = comp, \myVGA|LessThan9~9\, myVGA|LessThan9~9, MAIN, 1 +instance = comp, \myVGA|LessThan9~11\, myVGA|LessThan9~11, MAIN, 1 +instance = comp, \myVGA|LessThan9~12\, myVGA|LessThan9~12, MAIN, 1 +instance = comp, \myVGA|ball_speed_y~0\, myVGA|ball_speed_y~0, MAIN, 1 +instance = comp, \myVGA|ball_bounce:ball_speed_y[1]~0\, myVGA|\ball_bounce:ball_speed_y[1]~0, MAIN, 1 +instance = comp, \myVGA|ball_bounce:ball_speed_y[1]\, myVGA|\ball_bounce:ball_speed_y[1], MAIN, 1 +instance = comp, \myVGA|ball_y[7]~22\, myVGA|ball_y[7]~22, MAIN, 1 +instance = comp, \myVGA|ball_y[7]\, myVGA|ball_y[7], MAIN, 1 +instance = comp, \myVGA|ball_speed_y~1\, myVGA|ball_speed_y~1, MAIN, 1 +instance = comp, \myVGA|ball_y[8]~24\, myVGA|ball_y[8]~24, MAIN, 1 +instance = comp, \myVGA|ball_y[8]\, myVGA|ball_y[8], MAIN, 1 +instance = comp, \myVGA|Add16~0\, myVGA|Add16~0, MAIN, 1 +instance = comp, \myVGA|Add16~2\, myVGA|Add16~2, MAIN, 1 +instance = comp, \myVGA|Add16~4\, myVGA|Add16~4, MAIN, 1 +instance = comp, \myVGA|Add16~6\, myVGA|Add16~6, MAIN, 1 +instance = comp, \myVGA|Add16~8\, myVGA|Add16~8, MAIN, 1 +instance = comp, \myVGA|Add16~10\, myVGA|Add16~10, MAIN, 1 +instance = comp, \myVGA|Add16~12\, myVGA|Add16~12, MAIN, 1 +instance = comp, \myVGA|Add16~14\, myVGA|Add16~14, MAIN, 1 +instance = comp, \myVGA|Add16~16\, myVGA|Add16~16, MAIN, 1 +instance = comp, \myVGA|Add16~18\, myVGA|Add16~18, MAIN, 1 +instance = comp, \myVGA|LessThan14~1\, myVGA|LessThan14~1, MAIN, 1 +instance = comp, \myVGA|LessThan14~3\, myVGA|LessThan14~3, MAIN, 1 +instance = comp, \myVGA|LessThan14~5\, myVGA|LessThan14~5, MAIN, 1 +instance = comp, \myVGA|LessThan14~7\, myVGA|LessThan14~7, MAIN, 1 +instance = comp, \myVGA|LessThan14~9\, myVGA|LessThan14~9, MAIN, 1 +instance = comp, \myVGA|LessThan14~11\, myVGA|LessThan14~11, MAIN, 1 +instance = comp, \myVGA|LessThan14~13\, myVGA|LessThan14~13, MAIN, 1 +instance = comp, \myVGA|LessThan14~15\, myVGA|LessThan14~15, MAIN, 1 +instance = comp, \myVGA|LessThan14~17\, myVGA|LessThan14~17, MAIN, 1 +instance = comp, \myVGA|LessThan14~18\, myVGA|LessThan14~18, MAIN, 1 +instance = comp, \myVGA|Add14~20\, myVGA|Add14~20, MAIN, 1 +instance = comp, \myVGA|Add15~0\, myVGA|Add15~0, MAIN, 1 +instance = comp, \myVGA|Add15~2\, myVGA|Add15~2, MAIN, 1 +instance = comp, \myVGA|Add15~4\, myVGA|Add15~4, MAIN, 1 +instance = comp, \myVGA|Add15~6\, myVGA|Add15~6, MAIN, 1 +instance = comp, \myVGA|Add15~8\, myVGA|Add15~8, MAIN, 1 +instance = comp, \myVGA|Add15~10\, myVGA|Add15~10, MAIN, 1 +instance = comp, \myVGA|Add15~12\, myVGA|Add15~12, MAIN, 1 +instance = comp, \myVGA|Add15~14\, myVGA|Add15~14, MAIN, 1 +instance = comp, \myVGA|Add15~16\, myVGA|Add15~16, MAIN, 1 +instance = comp, \myVGA|Add15~18\, myVGA|Add15~18, MAIN, 1 +instance = comp, \myVGA|LessThan13~1\, myVGA|LessThan13~1, MAIN, 1 +instance = comp, \myVGA|LessThan13~3\, myVGA|LessThan13~3, MAIN, 1 +instance = comp, \myVGA|LessThan13~5\, myVGA|LessThan13~5, MAIN, 1 +instance = comp, \myVGA|LessThan13~7\, myVGA|LessThan13~7, MAIN, 1 +instance = comp, \myVGA|LessThan13~9\, myVGA|LessThan13~9, MAIN, 1 +instance = comp, \myVGA|LessThan13~11\, myVGA|LessThan13~11, MAIN, 1 +instance = comp, \myVGA|LessThan13~13\, myVGA|LessThan13~13, MAIN, 1 +instance = comp, \myVGA|LessThan13~15\, myVGA|LessThan13~15, MAIN, 1 +instance = comp, \myVGA|LessThan13~17\, myVGA|LessThan13~17, MAIN, 1 +instance = comp, \myVGA|LessThan13~18\, myVGA|LessThan13~18, MAIN, 1 +instance = comp, \myVGA|Add17~0\, myVGA|Add17~0, MAIN, 1 +instance = comp, \myVGA|Add17~2\, myVGA|Add17~2, MAIN, 1 +instance = comp, \myVGA|Add17~4\, myVGA|Add17~4, MAIN, 1 +instance = comp, \myVGA|Add17~6\, myVGA|Add17~6, MAIN, 1 +instance = comp, \myVGA|Add17~8\, myVGA|Add17~8, MAIN, 1 +instance = comp, \myVGA|Add17~10\, myVGA|Add17~10, MAIN, 1 +instance = comp, \myVGA|Add17~12\, myVGA|Add17~12, MAIN, 1 +instance = comp, \myVGA|Add17~14\, myVGA|Add17~14, MAIN, 1 +instance = comp, \myVGA|Add17~16\, myVGA|Add17~16, MAIN, 1 +instance = comp, \myVGA|Add17~18\, myVGA|Add17~18, MAIN, 1 +instance = comp, \myVGA|LessThan15~1\, myVGA|LessThan15~1, MAIN, 1 +instance = comp, \myVGA|LessThan15~3\, myVGA|LessThan15~3, MAIN, 1 +instance = comp, \myVGA|LessThan15~5\, myVGA|LessThan15~5, MAIN, 1 +instance = comp, \myVGA|LessThan15~7\, myVGA|LessThan15~7, MAIN, 1 +instance = comp, \myVGA|LessThan15~9\, myVGA|LessThan15~9, MAIN, 1 +instance = comp, \myVGA|LessThan15~11\, myVGA|LessThan15~11, MAIN, 1 +instance = comp, \myVGA|LessThan15~13\, myVGA|LessThan15~13, MAIN, 1 +instance = comp, \myVGA|LessThan15~15\, myVGA|LessThan15~15, MAIN, 1 +instance = comp, \myVGA|LessThan15~17\, myVGA|LessThan15~17, MAIN, 1 +instance = comp, \myVGA|LessThan15~18\, myVGA|LessThan15~18, MAIN, 1 +instance = comp, \myVGA|Add15~20\, myVGA|Add15~20, MAIN, 1 +instance = comp, \myVGA|ball_draw~0\, myVGA|ball_draw~0, MAIN, 1 +instance = comp, \myVGA|ball_draw~1\, myVGA|ball_draw~1, MAIN, 1 +instance = comp, \myVGA|color_mask[0]\, myVGA|color_mask[0], MAIN, 1 +instance = comp, \myVGA|can_draw~0\, myVGA|can_draw~0, MAIN, 1 +instance = comp, \myVGA|V_SYNC_GEN~0\, myVGA|V_SYNC_GEN~0, MAIN, 1 +instance = comp, \myVGA|can_draw~1\, myVGA|can_draw~1, MAIN, 1 +instance = comp, \myVGA|can_draw\, myVGA|can_draw, MAIN, 1 +instance = comp, \myVGA|R[1]~0\, myVGA|R[1]~0, MAIN, 1 +instance = comp, \myVGA|ball_g[1]~7\, myVGA|ball_g[1]~7, MAIN, 1 +instance = comp, \myVGA|ball_g[1]\, myVGA|ball_g[1], MAIN, 1 +instance = comp, \myVGA|R[2]~1\, myVGA|R[2]~1, MAIN, 1 +instance = comp, \myVGA|ball_g[2]~9\, myVGA|ball_g[2]~9, MAIN, 1 +instance = comp, \myVGA|ball_g[2]\, myVGA|ball_g[2], MAIN, 1 +instance = comp, \myVGA|R[3]~2\, myVGA|R[3]~2, MAIN, 1 +instance = comp, \myVGA|ball_g[3]~11\, myVGA|ball_g[3]~11, MAIN, 1 +instance = comp, \myVGA|ball_g[3]\, myVGA|ball_g[3], MAIN, 1 +instance = comp, \myVGA|R[4]~3\, myVGA|R[4]~3, MAIN, 1 +instance = comp, \myVGA|ball_g[4]~13\, myVGA|ball_g[4]~13, MAIN, 1 +instance = comp, \myVGA|ball_g[4]\, myVGA|ball_g[4], MAIN, 1 +instance = comp, \myVGA|R[5]~4\, myVGA|R[5]~4, MAIN, 1 +instance = comp, \myVGA|ball_g[5]~15\, myVGA|ball_g[5]~15, MAIN, 1 +instance = comp, \myVGA|ball_g[5]\, myVGA|ball_g[5], MAIN, 1 +instance = comp, \myVGA|R[6]~5\, myVGA|R[6]~5, MAIN, 1 +instance = comp, \myVGA|ball_g[6]~17\, myVGA|ball_g[6]~17, MAIN, 1 +instance = comp, \myVGA|ball_g[6]\, myVGA|ball_g[6], MAIN, 1 +instance = comp, \myVGA|R[7]~6\, myVGA|R[7]~6, MAIN, 1 +instance = comp, \myVGA|ball_g[7]~19\, myVGA|ball_g[7]~19, MAIN, 1 +instance = comp, \myVGA|ball_g[7]\, myVGA|ball_g[7], MAIN, 1 +instance = comp, \myVGA|G[7]~0\, myVGA|G[7]~0, MAIN, 1 +instance = comp, \myVGA|ball_b[1]~9\, myVGA|ball_b[1]~9, MAIN, 1 +instance = comp, \myVGA|ball_b[1]~10\, myVGA|ball_b[1]~10, MAIN, 1 +instance = comp, \myVGA|ball_b[1]\, myVGA|ball_b[1], MAIN, 1 +instance = comp, \myVGA|B[1]~0\, myVGA|B[1]~0, MAIN, 1 +instance = comp, \myVGA|ball_b[2]~12\, myVGA|ball_b[2]~12, MAIN, 1 +instance = comp, \myVGA|ball_b[2]\, myVGA|ball_b[2], MAIN, 1 +instance = comp, \myVGA|B[2]~1\, myVGA|B[2]~1, MAIN, 1 +instance = comp, \myVGA|ball_b[3]~14\, myVGA|ball_b[3]~14, MAIN, 1 +instance = comp, \myVGA|ball_b[3]\, myVGA|ball_b[3], MAIN, 1 +instance = comp, \myVGA|B[3]~2\, myVGA|B[3]~2, MAIN, 1 +instance = comp, \myVGA|ball_b[4]~16\, myVGA|ball_b[4]~16, MAIN, 1 +instance = comp, \myVGA|ball_b[4]\, myVGA|ball_b[4], MAIN, 1 +instance = comp, \myVGA|B[4]~3\, myVGA|B[4]~3, MAIN, 1 +instance = comp, \myVGA|ball_b[5]~18\, myVGA|ball_b[5]~18, MAIN, 1 +instance = comp, \myVGA|ball_b[5]\, myVGA|ball_b[5], MAIN, 1 +instance = comp, \myVGA|B[5]~4\, myVGA|B[5]~4, MAIN, 1 +instance = comp, \myVGA|ball_b[6]~20\, myVGA|ball_b[6]~20, MAIN, 1 +instance = comp, \myVGA|ball_b[6]\, myVGA|ball_b[6], MAIN, 1 +instance = comp, \myVGA|B[6]~5\, myVGA|B[6]~5, MAIN, 1 +instance = comp, \myVGA|ball_b[7]~22\, myVGA|ball_b[7]~22, MAIN, 1 +instance = comp, \myVGA|ball_b[7]\, myVGA|ball_b[7], MAIN, 1 +instance = comp, \myVGA|B[7]~6\, myVGA|B[7]~6, MAIN, 1 +instance = comp, \myVGA|H_SYNC_GEN~0\, myVGA|H_SYNC_GEN~0, MAIN, 1 +instance = comp, \myVGA|H_SYNC_GEN~1\, myVGA|H_SYNC_GEN~1, MAIN, 1 +instance = comp, \myVGA|HS\, myVGA|HS, MAIN, 1 +instance = comp, \myVGA|V_SYNC_GEN~1\, myVGA|V_SYNC_GEN~1, MAIN, 1 +instance = comp, \myVGA|V_SYNC_GEN~2\, myVGA|V_SYNC_GEN~2, MAIN, 1 +instance = comp, \myVGA|VS\, myVGA|VS, MAIN, 1 diff --git a/src/greybox_tmp/cbx_args.txt b/src/greybox_tmp/cbx_args.txt new file mode 100644 index 0000000..352dd6d --- /dev/null +++ b/src/greybox_tmp/cbx_args.txt @@ -0,0 +1,58 @@ +BANDWIDTH_TYPE=AUTO +CLK0_DIVIDE_BY=2000 +CLK0_DUTY_CYCLE=50 +CLK0_MULTIPLY_BY=1007 +CLK0_PHASE_SHIFT=0 +COMPENSATE_CLOCK=CLK0 +INCLK0_INPUT_FREQUENCY=20000 +INTENDED_DEVICE_FAMILY="Cyclone IV E" +LPM_TYPE=altpll +OPERATION_MODE=NORMAL +PLL_TYPE=AUTO +PORT_ACTIVECLOCK=PORT_UNUSED +PORT_ARESET=PORT_UNUSED +PORT_CLKBAD0=PORT_UNUSED +PORT_CLKBAD1=PORT_UNUSED +PORT_CLKLOSS=PORT_UNUSED +PORT_CLKSWITCH=PORT_UNUSED +PORT_CONFIGUPDATE=PORT_UNUSED +PORT_FBIN=PORT_UNUSED +PORT_INCLK0=PORT_USED +PORT_INCLK1=PORT_UNUSED +PORT_LOCKED=PORT_UNUSED +PORT_PFDENA=PORT_UNUSED +PORT_PHASECOUNTERSELECT=PORT_UNUSED +PORT_PHASEDONE=PORT_UNUSED +PORT_PHASESTEP=PORT_UNUSED +PORT_PHASEUPDOWN=PORT_UNUSED +PORT_PLLENA=PORT_UNUSED +PORT_SCANACLR=PORT_UNUSED +PORT_SCANCLK=PORT_UNUSED +PORT_SCANCLKENA=PORT_UNUSED +PORT_SCANDATA=PORT_UNUSED +PORT_SCANDATAOUT=PORT_UNUSED +PORT_SCANDONE=PORT_UNUSED +PORT_SCANREAD=PORT_UNUSED +PORT_SCANWRITE=PORT_UNUSED +PORT_clk0=PORT_USED +PORT_clk1=PORT_UNUSED +PORT_clk2=PORT_UNUSED +PORT_clk3=PORT_UNUSED +PORT_clk4=PORT_UNUSED +PORT_clk5=PORT_UNUSED +PORT_clkena0=PORT_UNUSED +PORT_clkena1=PORT_UNUSED +PORT_clkena2=PORT_UNUSED +PORT_clkena3=PORT_UNUSED +PORT_clkena4=PORT_UNUSED +PORT_clkena5=PORT_UNUSED +PORT_extclk0=PORT_UNUSED +PORT_extclk1=PORT_UNUSED +PORT_extclk2=PORT_UNUSED +PORT_extclk3=PORT_UNUSED +WIDTH_CLOCK=5 +DEVICE_FAMILY="Cyclone IV E" +CBX_AUTO_BLACKBOX=ALL +inclk +inclk +clk diff --git a/src/main.vhd b/src/main.vhd new file mode 100644 index 0000000..2debcc8 --- /dev/null +++ b/src/main.vhd @@ -0,0 +1,52 @@ +library IEEE; +use IEEE.std_logic_1164.all; + +entity MAIN is + + port ( + VGA_BLANK, VGA_SYNC, VGA_CLK : out std_logic; + clk, rst : in std_logic; + R, G, B : out std_logic_vector (7 downto 0); + HS, VS : out std_logic); + +end entity MAIN; + + +architecture mymain of MAIN is + component VGA is + port( + px_clk, rst : in std_logic; + R, G, B : out std_logic_vector (7 downto 0); + HS, VS : out std_logic); + end component VGA; + + component PLL is + port ( + inclk0 : in std_logic := '0'; + c0 : out std_logic + ); + end component PLL; + + signal px_clk : std_logic; + +begin + + -- USED BY the ADC + VGA_BLANK <= '1'; + VGA_SYNC <= '0'; + VGA_CLK <= px_clk; + + myVGA : VGA port map ( + px_clk => px_clk, -- this signals a new px + rst => rst, + R => R, + G => G, + B => B, + HS => HS, + VS => VS); -- this signals a new frame + + myPLL : PLL port map ( + inclk0 => clk, + c0 => px_clk); + +end architecture; diff --git a/src/vga.vhd b/src/vga.vhd new file mode 100644 index 0000000..2272c1c --- /dev/null +++ b/src/vga.vhd @@ -0,0 +1,183 @@ +library IEEE; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity VGA is + + port ( + px_clk, rst : in std_logic; + R, G, B : out std_logic_vector (7 downto 0); + HS, VS : out std_logic); + +end entity VGA; + +architecture myVGA of VGA is + + -- Horizontal timings + constant H_VISIBLE_AREA : integer := 640; + constant H_FP : integer := 16; + constant H_SYNC : integer := 96; + constant H_BP : integer := 48; + constant H_ALL : integer := 800; + + -- Vertical timings + constant V_VISIBLE_AREA : integer := 480; + constant V_FP : integer := 10; + constant V_SYNC : integer := 2; + constant V_BP : integer := 33; + constant V_ALL : integer := 525; + + -- local + signal h_px_count : integer range 0 to H_ALL; + signal v_px_count : integer range 0 to V_ALL; + signal can_draw : std_logic; + + -- ball + signal ball_x : integer range 0 to H_VISIBLE_AREA; + signal ball_y : integer range 0 to V_VISIBLE_AREA; + signal color_mask : std_logic_vector (7 downto 0); + signal BALL_WIDTH : integer range 10 to 50; + signal ball_r : integer range 0 to 255; -- colors + signal ball_g : integer range 0 to 255; + signal ball_b : integer range 0 to 255; + +begin -- architecture myVGA + + VH_PX_COUNTER : process (px_clk, rst) is + begin -- process H_PX_COUNTER + if rst = '0' then -- asynchronous reset (active low) + h_px_count <= 0; + elsif rising_edge(px_clk) then -- rising clock edge + if h_px_count < H_ALL then + h_px_count <= h_px_count + 1; + else + h_px_count <= 0; + v_px_count <= v_px_count + 1; + end if; + if v_px_count = V_ALL then + v_px_count <= 0; + end if; + end if; + end process VH_PX_COUNTER; + + V_SYNC_GEN : process (px_clk, rst, v_px_count) is + begin -- process V_SYNC_GEN + if rst = '0' then -- asynchronous reset (active low) + VS <= '1'; + elsif rising_edge(px_clk) then -- rising clock edge + if v_px_count >= V_VISIBLE_AREA + V_FP and v_px_count < V_ALL - V_BP then + VS <= '0'; + else + VS <= '1'; + end if; + end if; + end process V_SYNC_GEN; + + H_SYNC_GEN : process (px_clk, rst, h_px_count) is + begin -- process H_SYNC_GEN + if rst = '0' then -- asynchronous reset (active low) + HS <= '1'; + elsif rising_edge(px_clk) then -- rising clock edge + if h_px_count >= H_VISIBLE_AREA + H_FP and h_px_count < H_ALL - H_BP then + HS <= '0'; + else + HS <= '1'; + end if; + end if; + end process H_SYNC_GEN; + + CAN_DRAW_GEN : process (px_clk, rst, v_px_count, h_px_count) is + begin -- process CAN_DRAW_GEN + if rst = '0' then -- asynchronous reset (active low) + + elsif rising_edge(px_clk) then -- rising clock edge + if v_px_count < V_VISIBLE_AREA and h_px_count < H_VISIBLE_AREA then + can_draw <= '1'; + else + can_draw <= '0'; + end if; + end if; + end process CAN_DRAW_GEN; + + process (can_draw) is + begin -- process + if can_draw = '1' then + R <= color_mask and std_logic_vector(to_unsigned(ball_r, 8)); + G <= color_mask and std_logic_vector(to_unsigned(ball_g, 8)); + B <= color_mask and std_logic_vector(to_unsigned(ball_b, 8)); + else + R <= "00000000"; + G <= "00000000"; + B <= "00000000"; + end if; + end process; + + ball_bounce : process (v_px_count) is + variable count : integer range 0 to 300; + variable ball_speed_x : integer range -1 to 1 := 1; + variable ball_speed_y : integer range -1 to 1 := 1; + begin -- process ball_bounce + if rising_edge(px_clk) and v_px_count = 0 then + + if count < 300 then + count := count + 1; + else + count := 0; + + if ball_x >= H_VISIBLE_AREA - BALL_WIDTH then + ball_speed_x := - ball_speed_x; + end if; + if ball_y >= V_VISIBLE_AREA - BALL_WIDTH then + ball_speed_y := - ball_speed_y; + end if; + + if ball_x < BALL_WIDTH then + ball_x <= BALL_WIDTH + 1; + ball_speed_x := abs(ball_speed_x); + end if; + if ball_y < BALL_WIDTH then + ball_y <= BALL_WIDTH + 1; + ball_speed_y := abs(ball_speed_y); + end if; + + ball_x <= ball_x + ball_speed_x; + ball_y <= ball_y + ball_speed_y; + + -- random colors + ball_r <= ball_r + 2; + ball_g <= ball_g + 1; + ball_b <= ball_b + 3; + end if; + + end if; + end process ball_bounce; + + ball_draw : process (px_clk) is + begin -- process ball_draw + if rising_edge(px_clk) then + if h_px_count < ball_x + BALL_WIDTH and h_px_count >= ball_x - BALL_WIDTH and + v_px_count < ball_y + BALL_WIDTH and v_px_count >= ball_y - BALL_WIDTH then + color_mask <= "11111111"; + else + color_mask <= "00000000"; + end if; + end if; + end process ball_draw; + + vary_ball_width : process (v_px_count) is + variable count : integer range 0 to 1023; + variable growth : integer range -1 to 1 := 1; + begin -- process ball_bounce + if rising_edge(px_clk) and v_px_count = 0 then + count := count + 1; + if count = 1023 then + if BALL_WIDTH = 50 then + growth := -1; + elsif BALL_WIDTH = 10 then + growth := 1; + end if; + BALL_WIDTH <= BALL_WIDTH + growth; + end if; + end if; + end process; +end architecture myVGA; diff --git a/vga.qpf b/vga.qpf new file mode 100644 index 0000000..9ba73fa --- /dev/null +++ b/vga.qpf @@ -0,0 +1,31 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 2023 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions +# and other software and tools, and any partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License +# Subscription Agreement, the Intel Quartus Prime License Agreement, +# the Intel FPGA IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Intel and sold by Intel or its authorized distributors. Please +# refer to the applicable agreement for further details, at +# https://fpgasoftware.intel.com/eula. +# +# -------------------------------------------------------------------------- # +# +# Quartus Prime +# Version 22.1std.2 Build 922 07/20/2023 SC Lite Edition +# Date created = 13:50:20 August 26, 2023 +# +# -------------------------------------------------------------------------- # + +QUARTUS_VERSION = "22.1" +DATE = "13:50:20 August 26, 2023" + +# Revisions + +PROJECT_REVISION = "vga" diff --git a/vga.qsf b/vga.qsf new file mode 100644 index 0000000..71cfb15 --- /dev/null +++ b/vga.qsf @@ -0,0 +1,99 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 2023 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions +# and other software and tools, and any partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License +# Subscription Agreement, the Intel Quartus Prime License Agreement, +# the Intel FPGA IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Intel and sold by Intel or its authorized distributors. Please +# refer to the applicable agreement for further details, at +# https://fpgasoftware.intel.com/eula. +# +# -------------------------------------------------------------------------- # +# +# Quartus Prime +# Version 22.1std.2 Build 922 07/20/2023 SC Lite Edition +# Date created = 13:50:20 August 26, 2023 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# vga_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Intel recommends that you do not modify this file. This +# file is updated automatically by the Quartus Prime software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "Cyclone IV E" +set_global_assignment -name DEVICE EP4CE115F29C7 +set_global_assignment -name TOP_LEVEL_ENTITY main +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 22.1STD.2 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:50:20 AUGUST 26, 2023" +set_global_assignment -name LAST_QUARTUS_VERSION "22.1std.2 Lite Edition" +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 +set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V +set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (VHDL)" +set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation +set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation +set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_timing +set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_symbol +set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_signal_integrity +set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_boundary_scan +set_location_assignment PIN_D12 -to B[7] +set_location_assignment PIN_D11 -to B[6] +set_location_assignment PIN_C12 -to B[5] +set_location_assignment PIN_A11 -to B[4] +set_location_assignment PIN_B11 -to B[3] +set_location_assignment PIN_C11 -to B[2] +set_location_assignment PIN_A10 -to B[1] +set_location_assignment PIN_B10 -to B[0] +set_location_assignment PIN_C9 -to G[7] +set_location_assignment PIN_F10 -to G[6] +set_location_assignment PIN_B8 -to G[5] +set_location_assignment PIN_C8 -to G[4] +set_location_assignment PIN_H12 -to G[3] +set_location_assignment PIN_F8 -to G[2] +set_location_assignment PIN_G11 -to G[1] +set_location_assignment PIN_G8 -to G[0] +set_location_assignment PIN_H10 -to R[7] +set_location_assignment PIN_H8 -to R[6] +set_location_assignment PIN_J12 -to R[5] +set_location_assignment PIN_G10 -to R[4] +set_location_assignment PIN_F12 -to R[3] +set_location_assignment PIN_D10 -to R[2] +set_location_assignment PIN_E11 -to R[1] +set_location_assignment PIN_E12 -to R[0] +set_location_assignment PIN_C13 -to VS +set_location_assignment PIN_G13 -to HS +set_location_assignment PIN_R24 -to rst +set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" +set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" +set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS ON +set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL +set_global_assignment -name VHDL_FILE src/main.vhd +set_global_assignment -name VHDL_FILE src/vga.vhd +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_location_assignment PIN_F11 -to VGA_BLANK +set_location_assignment PIN_C10 -to VGA_SYNC +set_global_assignment -name QIP_FILE pll.qip +set_location_assignment PIN_AG14 -to clk +set_location_assignment PIN_A12 -to VGA_CLK +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/vga_io.csv b/vga_io.csv new file mode 100644 index 0000000..2847548 --- /dev/null +++ b/vga_io.csv @@ -0,0 +1,50 @@ +# Copyright (C) 2023 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions +# and other software and tools, and any partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License +# Subscription Agreement, the Intel Quartus Prime License Agreement, +# the Intel FPGA IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Intel and sold by Intel or its authorized distributors. Please +# refer to the applicable agreement for further details, at +# https://fpgasoftware.intel.com/eula. + +# Quartus Prime Version 22.1std.2 Build 922 07/20/2023 SC Lite Edition +# File: /home/lambda/Programs/intelQuartus/projects/vga/vga_io.csv +# Generated on: Sat Aug 26 14:34:23 2023 + +# Note: The column header names should not be changed if you wish to import this .csv file into the Quartus Prime software. + +To,Direction,Location,I/O Bank,VREF Group,Fitter Location,I/O Standard,Reserved,Current Strength,Slew Rate,Differential Pair,Strict Preservation +B[7],Output,PIN_D12,8,B8_N0,PIN_AD1,,,,,, +B[6],Output,PIN_D11,8,B8_N1,PIN_AD2,,,,,, +B[5],Output,PIN_C12,8,B8_N0,PIN_B7,,,,,, +B[4],Output,PIN_A11,8,B8_N0,PIN_AC2,,,,,, +B[3],Output,PIN_B11,8,B8_N0,PIN_T8,,,,,, +B[2],Output,PIN_C11,8,B8_N1,PIN_U6,,,,,, +B[1],Output,PIN_A10,8,B8_N0,PIN_AD3,,,,,, +B[0],Output,PIN_B10,8,B8_N0,PIN_R3,,,,,, +G[7],Output,PIN_C9,8,B8_N1,PIN_AA3,,,,,, +G[6],Output,PIN_F10,8,B8_N1,PIN_D10,,,,,, +G[5],Output,PIN_B8,8,B8_N1,PIN_U4,,,,,, +G[4],Output,PIN_C8,8,B8_N1,PIN_U5,,,,,, +G[3],Output,PIN_H12,8,B8_N1,PIN_AC1,,,,,, +G[2],Output,PIN_F8,8,B8_N2,PIN_Y4,,,,,, +G[1],Output,PIN_G11,8,B8_N1,PIN_AB1,,,,,, +G[0],Output,PIN_G8,8,B8_N2,PIN_R6,,,,,, +HS,Output,PIN_G13,8,B8_N0,PIN_R5,,,,,, +px_clk,Input,,,,PIN_J1,,,,,, +R[7],Output,PIN_H10,8,B8_N1,PIN_Y3,,,,,, +R[6],Output,PIN_H8,8,B8_N2,PIN_U3,,,,,, +R[5],Output,PIN_J12,8,B8_N0,PIN_AC3,,,,,, +R[4],Output,PIN_G10,8,B8_N1,PIN_G23,,,,,, +R[3],Output,PIN_F12,8,B8_N1,PIN_AA4,,,,,, +R[2],Output,PIN_D10,8,B8_N1,PIN_AB2,,,,,, +R[1],Output,PIN_E11,8,B8_N1,PIN_W1,,,,,, +R[0],Output,PIN_E12,8,B8_N1,PIN_AB3,,,,,, +rst,Input,,,,PIN_Y2,,,,,, +VS,Output,PIN_C13,8,B8_N0,PIN_T3,,,,,,