VGA-VHDL-altera/output_files/vga.cdf

14 lines
339 B
Mathematica

/* Quartus Prime Version 22.1std.2 Build 922 07/20/2023 SC Lite Edition */
JedecChain;
FileRevision(JESD32A);
DefaultMfr(6E);
P ActionCode(Cfg)
Device PartName(EP4CE115F29) Path("/home/lambda/Programs/intelQuartus/projects/vga/output_files/") File("vga.sof") MfrSpec(OpMask(1));
ChainEnd;
AlteraBegin;
ChainType(JTAG);
AlteraEnd;